Rick Merritt, EETimes
9/8/2011 8:17 AM EDT
TAIPEI – Xilinx will sample this fall an FPGA that packs two million logic cells thanks to use of an emerging stacked silicon interconnect. The chip shows progress in so-called 2.5-generation silicon interposer techniques, but Xilinx and others cautioned many challenges are still ahead for making full 3-D stacks using through silicon vias (TSVs).
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