NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Imperas Cooperates with Renesas Electronics on Verification of OVP Fast Processor Models of Renesas V850 Cores
OVP Fast Processor Models Being Used For Automotive Electronics Software Testing
OXFORD, England, Oct 12, 2011 -- Imperas(TM) today announced that Imperas and Renesas Electronics Corporation have been cooperating on the verification of the Open Virtual Platforms(TM) (OVP(TM)) Fast Processor Models of the Renesas V850 cores. These models are being used with the OVPsim(TM) virtual platform simulator, usually for software testing of automotive electronics applications. Users include NIRA Dynamics, a provider of tire pressure sensor systems.
Renesas and Imperas collaborated on the verification plan for the OVP Fast Processor Models(TM) of the V850 Family of CPU cores, and Renesas has supported Imperas with technology to assist in the verification of the OVP Fast Processor Models. "Imperas with its OVP Fast Processor Models is addressing key issues in software development for embedded systems," said Hirohiko Ono, senior manager of the MCU Tools Marketing Department for Renesas Electronics Corporation. "We are happy to work with Imperas to ensure that high quality models are easily available to our worldwide customers, helping them to develop and test software faster and more easily using virtual platforms."
"In the automotive electronics industry we always need to do more testing of our embedded systems software," said Peter Lindskog, head of development for NIRA Dynamics AB, a subsidiary of Audi Electronics Venture GmbH. "Finding that the simulation performance of the Imperas/OVP V850 model was 50 times faster than our previous solution opens up new possibilities for us in software testing, and enables us to increase our test coverage and product reliability."
All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. OVP processor models work with the OVPsim and Imperas simulators, which employ a state of the art just-in-time code morphing engine to achieve the simulation speed. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM2 based virtual platforms using the native TLM2 interface available with all OVP models. The native TLM2 interface enables multiple instantiations of the processor models in a single virtual platform, just as any other component would be instantiated. The OVP simulator can also be encapsulated within the Eclipse IDE, enabling easy use for software developers.
"Imperas is very excited to be working with Renesas, the leader in automotive MCUs," said Simon Davidmann, president and CEO, Imperas. "Cooperation between processor vendors and independent tool developers is critical to providing optimized flows for embedded software development."
About Imperas ( www.Imperas.com )
For more information about Imperas, please go to the Imperas website.
About the Open Virtual Platforms Initiative ( www.OVPworld.org )
For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/
|
Related News
- Fast Processor Models of Latest Arm Cores Released by Imperas and Open Virtual Platforms (OVP)
- Fast Processor Models of #ARM Cores Released by Imperas with Changes to OVP ARM Core Model Licensing Terms
- ARM Cortex-A15 and Cortex-R4 Fast Processor Models Provided by Imperas and OVP
- NECs CyberWorkBench and Imperas OVP Fast Processor Models Integrated to Expand Hardware-Software Co-Verification Capabilities
- Fast Processor Models of MIPS Technologies New Aptiv Generation Cores Released by Imperas and Open Virtual Platforms
Breaking News
- HPC customer engages Sondrel for high end chip design
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- TSMC drives A16, 3D process technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
E-mail This Article | Printer-Friendly Page |