Xilinx MicroBlaze Model Provided by Imperas and OVP
Imperas Joins Xilinx Alliance Program
OXFORD, United Kingdom, October 24, 2011 - Imperas™ today announced that a model of the Xilinx MicroBlaze™ soft processor core has been developed, and is being provided through the Open Virtual Platforms™ (OVP™) website. The OVP Fast Processor Model™ and example virtual platforms including the MicroBlaze core are available from the Open Virtual Platforms website, www.OVPworld.org/XILINX. Imperas also announced that they have joined the Xilinx Alliance Program, helping to expand the Xilinx embedded ecosystem with the MicroBlaze model, and their virtual platform and software development tools.
Xilinx has supported Imperas with technology to assist in the verification of the OVP Fast Processor Model of the MicroBlaze. “Imperas, with its OVP Fast Processor Models and software development tools, is addressing key issues in software development for embedded systems,” said Mark Jensen, director, processor platforms marketing for Xilinx. “We are excited to work with Imperas to ensure that high quality models are easily available to our customers worldwide, helping them to develop and test software faster and more efficiently using virtual platforms.”
The model of the MicroBlaze core works with both the Imperas and OVP simulators, and has shown exceptionally fast simulation performance of hundreds of millions of instructions per second. Users are able to use the MicroBlaze model as a standalone processor, or add peripheral models to it to more fully model their FPGAs. Users could even combine the MicroBlaze model with the OVP Fast Processor Model of the ARM Cortex-A9MPx2 to create their own virtual platform of the Zynq™-7000 Extensible Processing Platforms with a MicroBlaze core implemented in the FPGA fabric.
“We’ve been using OVP for embedded software development and system bring up,” said Maxime de Nanclas, CEO of Nuum Design. “We’re also Xilinx MicroBlaze users, and are excited to be able to use these technologies together to enable us to complete our projects faster and with fewer bugs.”
“Imperas is very excited to be working with Xilinx, the leading provider of programmable platforms,” said Simon Davidmann, president and CEO, Imperas and founding director of OVP. “As Xilinx products enable even more complex embedded systems to be implemented in their FPGAs, providing the Xilinx user community with state of the art software development tools becomes even more valuable for success.”
All OVP Fast Processor Models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle. OVP Fast Processor Models employ a state of the art just-in-time code morphing engine to achieve the simulation speed. Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM2 based virtual platforms using the native TLM2 interface available with all OVP models. The native TLM2 interface enables multiple instantiations of the processor models in a single virtual platform, just as any other component would be instantiated. The OVP simulator can also be encapsulated within the Eclipse IDE, enabling easy use for software developers.
In addition to working with the OVP simulator OVPsim™, the OVP Fast Processor Models work with the Imperas Multiprocessor/Multicore/Multithread Software Development Kit (M*SDK™). These advanced tools for multicore software verification and analysis include key tools for software development on virtual platforms such as OS and CPU-aware tracing (instruction, function, task, event), hot spot profiling, code coverage and memory and cache analysis. The Verification, Analysis and Profiling (M*VAP™) tools utilize the Imperas SlipStreamer™ patent pending binary interception technology. SlipStreamer enables these analytical tools to operate without any modification or instrumentation of the software source code, i.e., the tools are completely non-intrusive.
The OVP Fast Processor Model of the MicroBlaze soft processor core will be fully released before the end of year. To see a demo, or to participate in the beta program, please contact Imperas directly, or through the MicroBlaze page on the OVP website, www.OVPworld.org/XILINX.
About Imperas (www.Imperas.com)
For more information about Imperas, please go to the Imperas website.
About the Open Virtual Platforms Initiative (www.OVPworld.org)
For more information about OVP, please go to the About OVP page on the OVP website. Detailed quotations regarding OVP are available from http://www.ovpworld.org/quotes.
|
Related News
- ARM Cortex-A8, Cortex-A9 and Cortex-M4 Fast Processor Models Provided by Imperas and OVP
- Fast Processor Models of #ARM Cores Released by Imperas with Changes to OVP ARM Core Model Licensing Terms
- ARM Cortex-A15 and Cortex-R4 Fast Processor Models Provided by Imperas and OVP
- Fast Processor Models of MIPS Technologies New Aptiv Generation Cores Released by Imperas and Open Virtual Platforms
- ARM Cortex-A9 MPCore Fast Processor Models Provided by Imperas and OVP
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |