Industry Leaders Achieve Significant Power and Performance Gains With Synopsys' Low Power Solution
Advanced Solution Now in Mainstream Usage with More Than 125 Successful Tapeouts
MOUNTAIN VIEW, Calif., Dec. 5, 2011 -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that industry leaders worldwide have broadly deployed and successfully taped out more than 125 advanced multi-voltage designs using the Galaxy™ Implementation Platform low power solution and IEEE-1801 Unified Power Format (UPF) resulting in significant productivity, power and chip performance gains. Among these companies are Aquantia, Chongqing Chongyou Information Technology Co., Ltd. (CYIT), Emulex, HiSilicon Technologies, Lantiq, Microchip Technology, Movidius, Oticon, Progate Group Corporation, Samsung, Sunplus Technology, TSMC, VeriSilicon, Vimicro and others, targeting a broad spectrum of application markets including consumer electronics, wireless, DSP, mobile, microprocessor, networking, storage and portable medical devices.
Design for power is not limited to mobile applications – it affects a broad spectrum of market applications in which lowering power consumption has become a key requirement. With ever-increasing market demands for functional consolidation into a single chip, power consumption has become a primary constraint in design, along with performance and area. Implementation of advanced low power design techniques such as power management cell insertion and shutdown for multi-voltage designs is now required to handle the stringent power budget requirements of today's complex designs.
Using UPF specification of the design power intent, the Synopsys advanced low power solution enables automatic implementation of these advanced techniques. The Galaxy Implementation Platform meets low power challenges throughout the synthesis, physical design and sign-off phases of the design process. It consistently delivers the lowest power consumption, highest design performance and best quality of results while providing significant productivity through its complete low power portfolio.
"Meeting power budgets is a key requirement for most applications today," said Bijan Kiani, vice president of product marketing, design and manufacturing products, at Synopsys. "To remain competitive in their markets, our customers require the lowest power and highest performance for their designs. With more than 125 tapeouts to date, the Synopsys advanced low power solution is now in mainstream usage and enables our customers to bring more competitive products to market faster."
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
|
Synopsys, Inc. Hot Verification IP
Related News
- Oticon Standardizes on Synopsys Low Power Implementation Solution
- Innosilicon's Bitcoin ASIC powered by Samsung's Low Power FinFET technology to achieve record breaking performance
- Intel Custom Foundry Certifies Synopsys Design Platform for Intel's 22nm FinFET Low Power Process Technology
- Synopsys' Galaxy Design Platform Delivers Over 30% Leakage Power Reduction for Fujitsu Semiconductor's ARM-Powered Multi-Core
- Recore Systems Selects Synopsys' Galaxy Implementation Platform for Reconfigurable SoC Development
Breaking News
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PiMCHIP Deploys Ceva Sensor Hub DSP in New Edge AI SoC
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
Most Popular
- DENSO and U.S. Startup Quadric Sign Development License Agreement for AI Semiconductor (NPU)
- Xiphera and Crypto Quantique Announce Partnership for Quantum-Resilient Hardware Trust Engines
- Arm's power play will backfire
- Alchip Announces Successful 2nm Test Chip Tapeout
- Faraday Unveils HiSpeedKit™-HS Platform for High-speed Interface IP Verification in SoCs
E-mail This Article | Printer-Friendly Page |