Software Porting to Tensilica-based Multicore SOC Designs now aided by PolyCore Software's Poly-Platform
Update: Cadence Completes Acquisition of Tensilica (Apr 24, 2013)
BURLINGAME, Calif. And SANTA CLARA, Calif., December 22, 2011 - PolyCore Software, Inc. (PSI) and Tensilica, Inc. today announced a partnership to make it easier and faster for developers to port their software to, or design software for, integrated circuits with multiple Tensilica dataplane processors (DPUs). PSI's Poly-Platform toolset now comprehends Tensilica's entire DPU family, which ranges from small footprint controllers to the industry's highest-performance DSP (digital signal processor) IP core, with many variations in between.
PSI's Poly-Platform facilitates seamless scalability from single core to multicore architectures, enabling designers to take full advantage of sophisticated compute engines, accelerators and custom configurations. Using a friendly GUI (graphical user interface), the topology can be diagrammed and defined as a map that helps streamline the process of building and running the application. This efficient process significantly cuts development time and lets developers optimize application performance. Several scenarios can be tested in a short period of time.
Chip designers increasingly use multiple Tensilica DPUs in their design, each DPU optimized for a particular function in the data path, such as audio, baseband DSP, security, image processing, or more. Tensilica's DPUs are easily optimized for these compute-intensive applications.
"PolyCore Software's Poly-Platform speeds the process of mapping application software to multiple Tensilica DPUs," stated Steve Roddy, Tensilica's vice president of marketing and business development. "Ideally, during the design the software and hardware teams can use tools like Poly-Platform with our own processor design tools to make the best hardware/software tradeoffs. But even after the chip is made, the software team can greatly benefit from using Poly-Platform for the most efficient mapping of their software to our cores."
"Many semiconductor companies and OEMs have incorporated one or multiple Tensilica DPUs in their SOCs," said Sven Brehmer, president and CEO, PolyCore Software. "Our software gives developers the freedom from programming directly to the hardware interfaces, allowing them to quickly deploy their code on the various IP cores in that chip."
About Tensilica
Tensilica, Inc. is the leader in dataplane processor IP cores (DPUs). DPUs combine the best capabilities of DSPs and CPUs while delivering 10 to 100x the performance because they can be optimized using Tensilica's automated design tools to meet specific and demanding signal processing performance targets. Tensilica's DPUs power SOC designs at system OEMs and seven out of the top 10 semiconductor companies for designs in mobile wireless, telecom and network infrastructure, computing and storage, and home and auto entertainment. For more information on Tensilica's patented, benchmark-proven DPUs visit www.tensilica.com.
About PolyCore Software
PolyCore Software, Inc., provides development tools and run-time solutions to simplify application development and improve development productivity for multicore, multi-processor architectures. Improvements in time to market, development costs and risks are achieved through software reuse, ease of use development tools, and the generation of optimized run time program elements. Design for today's architectures and run on tomorrow's architectures. For more information, please visit www.polycoresoftware.com.
|
Related News
- PolyCore Software Introduces Poly-Platform 2.0 with Enhanced Memory Management Tools for Optimal Multicore Performance
- CoWare and Tensilica Deliver Software Development Solution for Multi-Core Tensilica-Based Platforms
- SRS Labs Ports TruSurround HD to Tensilica's HiFi 2 Audio Engine for HDTV SOC Designs
- Tensilica's Xtensa HiFi 2 Audio Engine Provides Low-Power, Turnkey 24-bit Audio for SOC Designs
- SiliconAuto adopts Siemens' PAVE360 to accelerate pre-silicon ADAS SoC development
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |