EnSilica announces new design centre in India focusing on verification
EnSilica plans to recruit 30 skilled verification specialists in 2012
Wokingham, UK – January 4, 2012 --- EnSilica, a leading independent provider of IC design services and system solutions, has opened a new design centre in India (Bangalore), to complement its existing design facilities in the UK. The new design centre will be a centre of excellence for the advanced verification of complex semiconductor products and IP. Verification services will be provided for both European and local customers based on a range of methodologies but with a particular focus on UVM (the Unified Verification Methodology) and SystemVerilog.
The new design centre will also provide a scalable resource for projects requiring larger teams to accelerate timescales or deal with complex tasks as well as broaden EnSilica’s design capabilities with the addition of new Verilog AMS (analog/mixed-signal) modelling, physical implementation and embedded software services. The new design centre will also further extend EnSilica’s existing turnkey ASIC and FPGA design capabilities with additional resources for developing EnSilica’s own portfolio of IP including its eSi-RISC highly configurable 16/32 bit embedded processors, eSi-Comms range of communications IP and eSi-Crypto encryption IP.
The Bangalore design centre will be headed by Ranganath Kempanahally as Director of Engineering. Ranganath has 15 years of wide ranging experience in ASIC design and verification roles in India, the USA and the UK. His broad spectrum of experience includes architecting advanced verification environments using eRM, OVM and UVM methodologies. He has a Masters in Electronics from the University of Mangalore, India and an MBA in “Finance and Entrepreneurship” from Cranfield School of Management in the UK.
EnSilica is actively seeking to recruit 30 skilled verification specialists for the new design centre in 2012. Applicants will be required to demonstrate experience in creating effective and pragmatic verification strategies, architecting the test environment and driving the verification process to a successful, on-time and on-budget conclusion.
“The opening of our new design centre in Bangalore, India, initially as a verification centre of excellence, is a strategic step in the ongoing development of our semiconductor services business,” said Ian Lankshear, CEO of EnSilica. “The new centre will provide a highly competitive, additional platform for our customers as well as a firm foundation for the development of a range of new and improved capabilities.”
About EnSilica
EnSilica is an established company with many years experience providing high quality IC design services to customers undertaking FPGA and ASIC designs. EnSilica has an impressive record of success working across many market segments with particular expertise in multimedia and communications applications. Customers range from start-ups to blue-chip companies. EnSilica can provide the full range of IC design services, from System Level Design, RTL coding and Verification through to either a FPGA device or the physical design for ASIC designs. EnSilica also offers a portfolio of IP, including a highly configurable 16/32 bit embedded processor called eSi-RISC, the eSi-Comms range of communications IP and eSi-Crypto encryption IP. For further information about EnSilica, visit http://www.ensilica.com.
|
EnSilica Ltd. Hot IP
Related News
- Axiomise Showcases Value of Formal Verification at DVCon Japan and DVCon India
- DVCon India 2023 | Keynote: "Journeying Beyond AI: Unleashing the Art of Verification" by Sivakumar P R, Founder & CEO, Maven Silicon
- India's Chip Designers To Get Access To State-Of-The-Art Tools At Newly Launched ChipIN Centre At C-DAC Bengaluru
- SmartDV to Demonstrate TileLink Verification IP for RISC-V Based Systems, Smart ViPDebug Protocol Debugger at DVCon India
- Sondrel Expands into India
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |