Alvand Technologies Analog IP Portfolio Availability in TSMC’s 28nm Process
Santa Clara, California -- January 5, 2012 --Alvand Technologies, Inc. (http://www.alvandtech.com) a leading analog and mixed signal IP provider, today announced that it is offering its ADC, DAC, MIMO and Video AFE Designs in High Performance (HP) and High Performance Mobile (HPM) of Analog IP in TSMC’s 28nm process node. The design kits are available on request for customer integration.
The Alvand analog IP portfolio includes 10, 12 and 14-bit data converters that operate at 250 MSps, 500 MSps and 1GSps. The ADC and DAC designs are optimized for low power and minimal die area.
Alvand's MIMO and VAFE subsystem IPs are now available in TSMC's 28nm processes. The Wireless MIMO AFE IP includes two 12-bit ADC cores, two 12-bit DAC cores, one 10-bit auxiliary ADC, one 10-bit auxiliary DAC and a low-jitter PLL. These IP cores are designed for extreme low-power operation.
These IP’s are the latest addition to the existing portfolio of silicon proven MIMO AFE, Video AFE and high performance data converter IPs across multiple nodes and in mass production.
About Alvand Technologies
Alvand Technologies offers best-in-class (ADC/DAC) and Analog Front End technologies in advanced deep-submicron manufacturing, available in 28nm, 40nm, 65nm, 90nm, 130nm and 180nm process nodes at TSMC, UMC and GLOBALFOUNDRIES. Alvand's wireless MIMO and Video AFE IP cores have been licensed in over 20 products currently in mass production. Alvand Technologies is privately held and is located in Santa Clara, California. For more information visit us at http://www.alvandtech.com
|
Related News
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Synopsys Announces Immediate Availability of Broad Portfolio of IP for TSMC 28HPC Process
- Synopsys Announces Immediate Availability of Broad Portfolio of Interface IP for TSMC's 20SoC Process
- Alvand Technologies Offers Analog Mixed-Signal IP in 28nm Process
- Altera Unveils Process Technology Strategy for Its 28-nm Product Portfolio
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |