ALMA project: Can programming of reconfigurable multi-cores be easier, please?

PARIS, - January 24, 2012 – Why must a programmer care for the hardware architecture when writing embedded applications for multi-core? Today at HiPEAC 2012, Prof. Nikolaos Voros explains how the ALMA Consortium intends to turn the 'MUST' into a 'MAY'. The ALMA Consortium proposes a tool chain that hides the complexity of hardware architectures from the programmer, and creates optimized code at the same time. “The ALMA tool-chain will implement parallelization and optimization algorithms for a whole class of multi-cores”, says Nikolaos Voros, scientific coordinator, and professor at Technological Educational Institute of Mesolonghi. “In ALMA, we will show how various embedded reconfigurable multi-cores from Karlsruhe Institute of Technology and Recore Systems can be efficiently programmed using the same tool-chain and the same application code”.

As Dimitrios Kritharidis, Head of Microelectronics & Embedded Systems Research at Intracom Telecom explains: “Embedded computing increasingly turns to multi-core systems to provide cutting edge products. The hardware is there, but the software tools to fully exploit the new hardware capabilities are still lacking. To stay ahead, we are eager to work with the latest research results on tomorrow’s tool-chains for the embedded multi-cores.”

The ALMA project leader, Prof. Jürgen Becker from the Karlsruhe Institute of Technology adds: “Our research focuses on adaptive embedded systems. We’ve seen a lot of progress in the development of dynamically reconfigurable hardware architectures, and we’ve noted that the software tooling to easily create lean and mean code for the hardware lag behind.” Within the ALMA project, Jürgen Becker continues “We work on corresponding hardware/software co-design and co-synthesis techniques. We include the hardware description in the software optimization, with the ultimate goal to use the same source code and the same tool-chain for various hardware platforms while generating efficient code. Efficient code means a faster embedded system that uses less energy. It is a field in which we can greatly contribute to low power usage in mobiles, wireless communication, camera’s, in short, anything that contains a chip.”

About the HiPEAC workshop

Prof. Nikolaos Voros, of the Technological Educational Institute of Mesolonghi, Greece will speak on Tuesday, January 24 at 17:00. Gerard Rauwerda, CTO of Recore Systems, will be available at the Industry Exhibit to discuss the ALMA project and reconfigurable multi-core systems in general.

More information on the HiPEAC 2012 Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms: http://paginas.fe.up.pt/~specs/events/ditam2012/.

About the ALMA project

ALMA (Greek for ‘leap’, Alma) is an acronym for ALgorithm parallelization for Multicore Architectures. Driven by the technology restrictions in chip design, the end of Moore’s law and the quest for increasing computing performance, ALMA is a fundamental step forward in the necessary introduction of novel computing paradigms and methodologies. ALMA strengthens the position of the EU in the world market of multiprocessor-targeted software tool chains. www.alma-project.eu

About the ALMA partners

The ALMA consortium brings together partners from industry and academia. The industry partners Recore Systems and Intracom Telecom contribute their expertise in reconfigurable hardware technology for multi-core systems-on-chip software development tools and real world applications. Five academic partners contribute their outstanding expertise in reconfigurable computing and compilation tools development: Karlsruhe Institute of Technology (KIT, Germany), Université de Rennes I (France), University of Peloponnese (Greece), Technological Educational Institute of Mesolonghi (Greece) and the Fraunhofer Institute of Optronics, System Technologies and Image Exploitation (Germany).

Research context and funding

The ALMA project is supported by the 7th Framework Programme of the European Unionunder grant agreement ICT- 287733.

More information on the individual partners