Tensilica Lays the Foundation for Software Programmable LTE-Advanced User Equipment PHY (Layer 1) in Less than 200mW
Update: Cadence Completes Acquisition of Tensilica (Apr 24, 2013)
New ConnX BBE32UE Optimized DSP Core Coupled with Tensilica Dataplane Processors (DPUs) Enable Ultra-Low Power LTE-Advanced PHY
Santa Clara, CA - February 21, 2012 - After great success in the LTE (Long-Term Evolution) handset baseband market, Tensilica, Inc. today announced that it is driving the transition to LTE-Advanced and has already secured lead customers for its new product - the ConnX BBE32UE DSP (digital signal processor) IP core for baseband SOC (system-on-chip) designs. Using the ConnX BBE32UE DSP core, coupled with Tensilica Baseband Dataplane processors (DPUs), a fully software programmable, flexible modem for LTE-Advanced user equipment category 7 PHY (Layer 1) can be realized in less than 200mW (28 nm HPL process). It can also support 2G, 3G, LTE and HSPA+ standards.
The transition from LTE to LTE-Advanced can require up to a 5x algorithm and data rate computation increase within a very tight power budget. Tensilica has worked with leading handset manufacturers to optimize the architecture and the instruction set of the ConnX BBE32UE for algorithms required by user equipment applications.
"Tensilica has made significant inroads into the LTE market, and this new product looks well positioned for LTE-Advanced user equipment," stated Will Strauss, president of Forward Concepts and leading DSP analyst. "Tensilica understands how tight the power budget will be for LTE-Advanced and has applied their customizable processor technology to meet this challenge."
Tensilica's flexible, processor-based solution is ideal for LTE-Advanced because the new algorithms may well need changing during field and interoperability testing. Previous design methods with hardwired implementations will not be able to provide the flexibility of algorithm updates, and most conventional wireless communications DSPs will fail to meet the power budget. With this new, very low-power DSP core and Baseband DPUs, Tensilica can offer system developers a path to implement flexible, ultra-low-power PHY systems.
Data bandwidth, an important criterion for LTE-Advanced User Equipment applications, is enhanced in the ConnX BBE32UE through the use of dual 256-bit load/store units. Additionally, designers can use Tensilica's proprietary Port (general-purpose I/O) and Queue interfaces to directly connect hardware blocks to the processing ALUs. This allows single cycle dedicated access without the need to go over a system bus, hence reducing the required clock frequency and power consumption.
"Our new ConnX BBE32UE IP core helps us reach new performance levels at the low power required for handset design," stated Eric Dewannain, Tensilica's vice president and general manager, baseband business unit. "We are excited about our design activity with major handset OEMs and IC manufacturers and appreciate their input as we worked to meet the challenging performance/power/area LTE-Advanced handset modem requirements."
Like other members of Tensilica's ConnX family of DSPs, the ConnX BBE32UE is fully programmable in C. It is software compatible with other ConnX DSPs and supported by an optimized DSP library.
While early access customers now have access to ConnX BBE32UE, general product release is planned for the third quarter of 2012.
About Tensilica
Tensilica, Inc. is the leader in dataplane processor IP cores. Dataplane processors (DPUs) combine the best capabilities of DSPs and CPUs while delivering 10 to 100x the performance because they can be optimized using Tensilica's automated design tools to meet specific and demanding signal processing performance targets. Tensilica's DPUs power SOC designs at system OEMs and seven out of the top 10 semiconductor companies for designs in mobile wireless, telecom and network infrastructure, computing and storage, and home and auto entertainment. For more information on Tensilica's patented, benchmark-proven DPUs visit www.tensilica.com.
|
Related News
- Xilinx and SAI Technology Announce Availability of First All Programmable Software Defined Radio Reference Design for LTE User Equipment
- Tensilica and mimoOn Partner to Provide the Only Comprehensive LTE and LTE-Advanced Hardware-Software PHY IP Solution
- mimoOn and Tensilica Offer Complete LTE PHY Reference Platform for User Equipment and eNodeB PHY at Mobile World Congress 2012
- Lockheed Martin Prepares First 5G.MIL® Payload for Orbit
- Cadence Extends Battery Life and Improves User Experience for Next-Generation Hearables, Wearables and Always-On Devices
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |