SpringSoft and Synopsys Link Debug Technologies to Speed Protocol Verification for SoC Designs
HSINCHU, Taiwan and MOUNTAIN VIEW, Calif., February 27 , 2012 – SpringSoft, Inc., a global supplier of specialized IC design software, and Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that they have linked SpringSoft’s Verdi Automated Debug System with Synopsys’ Protocol Analyzer. Part of the Synopsys Discovery™ VIP family, Protocol Analyzer enables engineers to quickly understand, identify and debug protocols in their designs. Through this linkage, the identified protocol violations and errors are seamlessly passed to the Verdi environment for detailed signal-level analysis to rapidly pinpoint the root causes of violations. As leading system-on-chip (SoC) designs incorporate multiple complex protocols, verification IP (VIP) has become a critical component of the verification environment, enabling engineers to reach their coverage goals within tight project schedules. With the increase in protocol complexity, protocol debug is now one of the most difficult and time-consuming aspects of SoC functional verification. This collaboration, implemented with SpringSoft’s VIA (Verdi Interoperability Apps) platform, directly addresses these challenges by combining the protocol-centric debug capabilities in Protocol Analyzer with the advanced design debug capabilities of the Verdi system.
“Protocol debug poses a significant challenge for SoC design teams,” said Mark Milligan, vice president of corporate marketing at SpringSoft. “We have had a long-term partnership with Synopsys to jointly address the verification challenges of our mutual customers with interoperable tools and flows. The VIA-enabled integration of Verdi, the industry’s de facto standard debug platform, and the advantages of Synopsys’ Discovery VIP provide a compelling solution to speed protocol debug.”
“As protocol complexity has increased, efficient protocol debug has become an area of concern for the industry,” said Janick Bergeron, verification fellow at Synopsys. “Addressing the protocol debug challenge was one of our key areas of focus when developing our next-generation VIP. With this collaboration, our protocol debug technology is integrated with SpringSoft’s market-leading design debug technology to further enhance SoC verification productivity.”
Verification engineers use VIP to test all SoC interface protocols, including ARM® AMBA® AXI4™, USB 3.0, PCI Express, and others. Protocol Analyzer, available with the Synopsys Discovery VIP family, provides protocol-centric debug and unique capabilities that enable engineers to quickly understand protocol activity, identify bottlenecks and debug unexpected behavior by minimizing unnecessary detail and focusing on high-level protocol activity such as AXI transactions, USB transfers or PCI Express packets. The Verdi Automated Debug System, the cornerstone of SpringSoft’s family of functional closure products, accelerates the process of finding, analyzing and correcting the root causes of errors revealed during the verification of complex digital IP components, design modules or entire SoCs.
The integrated flow between Protocol Analyzer and Verdi provides seamless and synchronized access between protocol transactions, transfers, packets and signal-level analysis of the design. This enables verification engineers to work at the most relevant level to determine the root cause of protocol violations and thereby speed the overall SoC debug process.
About SpringSoft
SpringSoft, Inc. (TAIEX: 2473) is a global supplier of specialized automation technologies that accelerate engineers during the design and verification of complex digital, analog and mixed-signal SoCs. Its award-winning product portfolio features the Verdi debug automation and Laker custom IC design solutions used by more than 400 of today's leading semiconductor companies, foundries, and electronic systems OEMs. Headquartered in Hsinchu, Taiwan, SpringSoft is the largest company in Asia specializing in IC design software and a recognized industry leader in customer service with more than 400 employees located in multiple R&D sites and local support offices around the world. For more information, visit www.springsoft.com.
About Synopsys®
Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
|
Related News
- Synopsys Announces DesignWare Protocol Analyzer for Verification of SuperSpeed USB 3.0-based Designs
- Synopsys and Arm Strengthen Collaboration for Faster Bring-Up of Next-Generation Mobile SoC Designs on the Most Advanced Nodes
- Dolphin Design unveils its innovative Energy Efficient Platforms, complete turnkey solutions for competitive SoC designs
- Hua Hong NEC Deploys Springsoft's Laker IC Design and Verdi Debug to Accelerate PDK Development and Chip Verification
- CM Engineering standardizes on Springsoft's Verdi Debug in Advanced Chip Verification Environment
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |