AMBA Parameter Configurable Multi-Channel DMA Controller (typically 1 to 256)
Who wins when Cortex-M adds RTOS?
Richard Barry, FreeRTOS.org
EETimes (3/6/2012 12:43 PM EST)
Richard Barry of FreeRTOS.org examines who the winners and losers will be in ARM's decision to add an RTOS to its Cortex-M hardware abstraction layer, through the release of CMSIS 3 (Cortex Microcontroller Software Interface Standard 3).
A significant development was announced at Embedded World 2012 that directly affects the RTOS industry--the release of CMSIS 3.
The Cortex Microcontroller Software Interface Standard (CMSIS) is a hardware abstraction layer that provides a standard software interface to the Cortex-M core. It's equally applicable to all Cortex-M based microcontrollers, so it's microcontroller-vendor independent. CMSIS simplifies software reuse and reduces a team's learning curve on the Cortex-M by providing a library of Cortex-M core-specific interface functions and definitions. For example, it provides a function that sets the priority of an interrupt, because the interrupt controller (NVIC) is part of the Cortex-M core itself, and not a separate peripheral as it is on ARM7-based microcontollers.
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