Adapteva close to sampling 28-nm, 64-core coprocessor
Peter Clarke, EETimes
3/18/2012 7:54 AM EDT
LONDON – Adapteva Inc. (Lexington, Mass.), a small and lean fabless startup that has developed a series of multicore floating-point processors, claims its latest device, a 28-nm 64-core processor is close to sampling.
The Epiphany architecture is designed to operate as an accelerator for DSP tasks such as speech recognition and image processing. The company has started out in specialized applications such as military, engineering services and financial markets, but is now looking to move into mobile applications.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related News
- Adapteva Uses Magma's RTL-to-GDSII Flow to Tape Out a 28-nm 64-Core Microprocessor Chip
- Adapteva Announces 28nm 64-Core Epiphany-IV Microprocessor Chip
- Fujitsu Semiconductor ASIC Design for 2G/3G/4G Baseband Processor in Volume Production with Synopsys 28-nm MIPI M-PHY
- GLOBALFOUNDRIES To Offer Adapteva's Processor IP For 28nm SoC Designs
- New Freescale 28-nm QorIQ AMP Series Processors Deliver High-End Features and Ultra-Low-Power Operation
Breaking News
- intoPIX Powers Ikegami's New IPX-100 with JPEG XS for Seamless & Low-Latency IP Production
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
- Qualcomm initiates global anti-trust complaint about Arm
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- SiliconIntervention Announces Availability of Silicon Based Fractal-D Audio Amplifier Evaluation Board
Most Popular
- Qualcomm initiates global anti-trust complaint about Arm
- Siemens acquires Altair to create most complete AI-powered portfolio of industrial software
- Alphawave Semi Reveals Suite of Optoelectronics Silicon Products addressing Hyperscaler Datacenter and AI Interconnect Market
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- Rapidus Announces Strategic Partnership with Quest Global to Enable Advanced 2nm Solutions for the AI Chip Era