Sagantec announces a new migration and DRC correction tool for 28nm and 20nm
SANTA CLARA, California – May 14, 2012 – Sagantec announced today its nmigrate layout migration and optimization tool specifically developed for 28nm and 20nm technology rules. nmigrate is based on the patented 2D dynamic compaction technology developed by NP-Komplete Technologies, whose acquisition Sagantec announced earlier this month. nmigrate has already been used successfully by several tier-1 semiconductor companies.
The nmigrate tool is based on two-dimensional, automated, dynamic layout compaction technology. It makes all necessary corrections to a layout to enforce complex, must-abide-by rules for 28nm and 20nm process technologies and below.
“Today’s 28nm and 20nm technologies present many new and tougher challenges for physical implementation. A library that is competitive from density, routability, reliability and variability perspectives and at the same time respects all new technology design rules is very hard to design manually in a timely manner. Furthermore, frequent changes and updates to new technology design rules make it even more challenging to keep up with manually” explained Coby Zelnik, Sagantec‘s president and CEO. “nmigrate is an automatic layout migration, compaction and optimization solution that is proven to successfully handle all these requirements and updates, delivering optimal results that are design rule clean” Zelnik concluded.
Product Capabilities
nmigrate can migrate and DRC-correct cell layout and make sure the layout adheres to all advanced design rules, including coloring for double patterning. The key benefits offered by nmigrate are:
- Higher quality layout, enabled by its 2d native engine and optimized handling of composite rules
- Faster time to solution, enabled by scalable automatic optimization of all layout requirements
The nmigrate tool has already been used successfully by several tier-1 semiconductor companies, and used with multiple cell libraries targeting multiple leading-edge 28nm and 20nm foundry processes.
Availability
nmigrate is already available for customers who design or migrate libraries for 28nm and 20nm processes. Sagantec offers both software license model as well as a service model.
At DAC’12
Sagantec will present and demonstrate nmigrate at this year’s Design Automation Conference, June 4-6 in San Francisco, CA. at booth number 1402.
About Sagantec
Sagantec's process migration tools are used to retarget semiconductor designs to either the next technology node or to a different process at the same or previous technology node, down to 20 nm. Privately held and funded, its corporate headquarters is at 2075 De La Cruz Blvd., Santa Clara, CA 95050. Telephone: (408) 727-6290 Fax: (408) 727-6288. On the Web at: http://www.sagantec.com
|
Related News
- Intento Enters EDA Market with Software that Accelerates Analog and Mixed-Signal Design, Enables IP Re-Use Through Technology Migration
- Xilinx Announces Fourth Quarter & Fiscal 2016 Results; Record 28nm & 20nm Sales, Dividend Raised For 11th Consecutive Year
- TSMC's 20nm, 28nm Technology Accounts for 50% of Sales
- G-Analog to Release GMIG, the World's Fastest Layout Migration and Prototyping Tool
- UMC Certifies Synopsys IC Validator Physical Verification Tool for 28 nm
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |