7 µW always on Audio feature extraction with filter banks on TSMC 22nm uLL
Target's IP Designer Tool-Suite Adopted by Dialog Semiconductor to Create OpenVG Graphics Processor Core
49th Design Automation Conference – San Francisco, California, June 4, 2012 -- Target Compiler Technologies, the leader in design tools for application-specific processors (ASIPs), today announced that Dialog Semiconductor adopted Target’s IP Designer™ tool-suite to create a new embedded graphics processor core. The highly-efficient and automated IP Designer tool-suite enabled the design of the processor architecture and hardware, and the implementation of the OpenVG™ 1.1 embedded graphics API in a record time, for integration into Dialog Semiconductor’s recently announced Green VoIP™ “SC14453” multicore system-on-chip (SoC).
IP Designer is a tool suite for designing ASIPs in multicore SoCs. These ASIPs offer high-performance and low-power consumption characteristics more typical of hardwired accelerators, yet provide the flexibility of a software-programmable solution. IP Designer enables quick architectural exploration to find the best instruction-set architecture for the application domain, and generates a complete software development kit (SDK) including an optimizing C compiler, as well as a low-power RTL hardware implementation for each ASIP.
While Dialog is a long-time user of Target’s IP Designer tool-suite, it was the first time for the company to apply the tool-suite in the graphics domain. The total number of ASIPs designed with IP Designer in Dialog’s SC14453 SoC is three: next to the graphics core it also contains two instances of Dialog’s Gen3DSP ASIP. Gen3DSP is an ultra-low power signal processor for audio and communication functions, also designed with IP Designer.
“Dialog’s new design underscores IP Designer’s suitability for creating and programming ASIPs for graphics processing,” says Werner Geurts, VP Applications at Target. “Key architectural features of this OpenVG graphics core include the use of application-specific floating-point operators of different word-lengths, a deep instruction pipeline with register bypasses to avoid dependency hazards, and the combined use of instruction-level parallelism and single-instruction multiple-data processing. IP Designer supports these features well, both in its C compiler and its RTL hardware generation technology,” Geurts continues.
René Kohlmann, Senior Director for Dialog’s Low Energy Wireless and VoIP Business Development, comments: “The addition of 2D graphics support to our new Green VoIP chip will enable our customers to add intuitive color touch-screens to their VoIP products. Ultra-low power and small area requirements dictated the design of an application-specific graphics processor. Using IP Designer’s automated generation capability of optimized hardware and C compiler, we were able to develop an OpenVG implementation in silicon right on schedule.”
“We are delighted with Dialog’s continued commitment to ASIP designs, based on our IP Designer tool-suite,” says Gert Goossens, Target’s CEO. “Systems-on-chip for consumer and enterprise products are evolving into advanced multi-functional multicore architectures. The combination of high performance, low power, low cost and flexibility naturally results in a need for multiple ASIPs. Dialog’s new Green VoIP chip illustrates this trend well. We are especially happy with this design win in the embedded graphics space, where we expect power and cost requirements will increasingly result in a choice for application-specific architectures,” Goossens adds.
About Target Compiler Technologies
Target Compiler Technologies (www.retarget.com) is the leading provider of retargetable software tools to accelerate the design, programming and verification of application-specific processor cores (ASIPs). Target's IP Designer tool suite is ideally suited for SoC designs in markets that mandate low silicon cost, low energy consumption, and flexibility to accommodate algorithmic changes. The tools have been used by customers around the globe to design SoCs for 2G/3G/4G handsets, cordless and VoIP phones, audio/video/image processing, infotainment and security for cars, DSL modems, DSL access multiplexers, wireless LAN, hearing instruments, and personal healthcare systems. Target is a spin-off of the Belgian nano-electronics R&D center IMEC, is headquartered in Leuven, Belgium, with North American operations in Boulder, Colorado.
|
Related News
- CogniVue Adopts Target's IP Designer Tool-Suite to Build Next-Generation Image Cognition Processor
- Huawei Adopts Target's IP Designer Tool-Suite to Build Next-Generation Baseband DSP
- Conexant Adopts Target's IP Designer Tool-Suite to Build Next-Generation Foundation DSP IP
- Dialog Semiconductor delivers critical system power management for tablets based on the next generation Intel Atom processors
- Achronix FPGAs Add Support for Bluespec's Linux-capable RISC-V Soft Processors to Enable Scalable Processing
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |