Synopsys and SMIC Announce DesignWare IP for 40-nm Low-Leakage Process
Synopsys' DesignWare Embedded Memory, Logic Library, Analog and Interface IP for SMIC's Advanced Low-Power Process Enables Faster Development of SoCs for Mobile Markets
MOUNTAIN VIEW, Calif. and SHANGHAI -- July 10, 2012 --Synopsys, Inc., a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, and Semiconductor Manufacturing International Corporation ("SMIC"; NYSE: SMI; SEHK: 981), China's largest and most advanced semiconductor foundry, today announced the availability of a broad set of Synopsys DesignWare IP on the SMIC 40-nanometer (nm) low-leakage (40LL) process. The SMIC 40LL process technology combines advanced immersion lithography, strain engineering, ultra shallow junction and ultra low-k dielectric to deliver the optimized power and performance required of mobile multimedia and consumer devices. By offering a wide range of proven IP on SMIC's advanced low-power process, Synopsys is enabling designers to incorporate more functionality into their advanced system-on-chip (SoC) designs with less risk and faster time to market. Since 2005, the collaboration between Synopsys and SMIC has resulted in Synopsys' delivery of a broad portfolio of IP supporting SMIC processes from 130-nm to 40-nm.
Synopsys DesignWare IP available now or scheduled to be available later this year on the SMIC 40LL process includes:
- Interface IP for widely used protocols such as USB 2.0/3.0, PCI Express 2.0/1.1, MIPI, SATA, DDR, and HDMI that reduces interoperability risk
- Audio codec and data converter IP, optimized for a wide range of high-performance, low-power applications
- Embedded memories and logic libraries that enable designers to achieve both high speed and low power across the entire SoC
"Access to a broad portfolio of silicon-proven IP in a high-performance, low-power process technology is critical for companies designing SoCs for multimedia consumer products in China and around the world," said Chris Chi, Chief Business Officer at SMIC. "Our collaboration with Synopsys offers designers targeting the consumer market a proven path to a wide range of technology-leading IP on advanced process nodes. Our first-pass silicon success with Synopsys' DesignWare USB, HDMI and audio codec IP, where all critical performance metrics meet or exceed the target specifications, demonstrates the stability and maturity of SMIC's 40LL technology."
"Our longstanding collaboration with SMIC provides SoC designers with optimized IP across a range of processes for widely used interface protocols such as USB, PCI Express and DDR, as well as foundational elements such as logic libraries and embedded memories," said John Koeter, vice president of marketing for IP and systems at Synopsys. "Together, we have a track record of silicon success over a range of IP from 130-nm to 65-nm. Extending our IP offerings to SMIC's 40LL process allows designers to take advantage of SMIC's advanced low-leakage process technology and integrate high-quality IP with less risk."
Availability
DesignWare USB 2.0 picoPHY, HDMI 1.4 TX PHY, DDR multiPHY, MIPI D-PHY, PCI Express 2.0/1.1 PHY, SATA 1.5Gb/s/3Gb/s PHY, SATA 6Gb/s PHY, and select audio codecs and data converter IP are available now from Synopsys on the SMIC 40LL process. DesignWare USB 3.0 PHY, HSIC PHY, data converters and AFE for LTE and Wi-Fi, and Embedded Memory and Logic Library IP are available for early adopters. Availability for the DesignWare HDMI RX PHY and DDR3/2 PHY IP is planned for Q4 2012.
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for system-on-chip (SoC) designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP, embedded memories, logic libraries, processor cores and subsystems. To support software development and hardware/software integration of the IP, Synopsys offers drivers, transaction-level models, and prototypes for many of its IP products. Synopsys' HAPS® FPGA-Based Prototyping Solution enables validation of the IP and the SoC in the system context. Synopsys' Virtualizer(TM) virtual prototyping tool set allows developers to start the development of software for the IP or the entire SoC significantly earlier compared to traditional methods. With a robust IP development methodology, extensive investment in quality, IP prototyping, software development and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit http://www.synopsys.com/designware .
About Synopsys
Synopsys, Inc. is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com .
About SMIC
Semiconductor Manufacturing International Corporation ("SMIC"; NYSE: SMI; SEHK: 981) is one of the leading semiconductor foundries in the world and the largest and most advanced foundry in Mainland China, providing integrated circuit (IC) foundry and technology services at 0.35-micron to 40-nanometer. Headquartered in Shanghai, China, SMIC has a 300mm wafer fabrication facility (fab) and three 200mm wafer fabs in its Shanghai mega-fab, two 300mm wafer fabs in its Beijing mega-fab, a 200mm wafer fab in Tianjin, and a 200mm fab under construction in Shenzhen. SMIC also has customer service and marketing offices in the U.S., Europe, Japan, and Taiwan, and a representative office in Hong Kong. In addition, SMIC manages and operates a 300mm wafer fab in Wuhan owned by Wuhan Xinxin Semiconductor Manufacturing Corporation.
For more information, please visit www.smics.com .
|
Synopsys, Inc. Hot Verification IP
Related News
- Synopsys and SMIC Team to Deliver Proven SoC Design Solution for 65-nm to 40-nm Process Nodes
- Synopsys Announces Immediate Availability of DesignWare MIPI M-PHY IP in 40-nm Process Technology
- Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies
- Synopsys and TSMC Collaborate to Develop DesignWare Foundation IP for Low-Power TSMC 40-nm eFlash Processes
- Synopsys Announces Availability of Logic Library and Embedded Memory IP for Mie Fujitsu Semiconductor 40-nm Low-Power Process
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |