Arasan Chip Systems Announces support of new JEDEC standard; eMMC 4.51
As an active member of JEDEC, Arasan delivers the latest eMMC version with minimum delay
San Jose, CA -- July 20, 2012 -- Arasan Chip Systems, Inc. (“Arasan”), a leading provider of Total IP Solutions, announced today the support of the new standard eMMC 4.51 in their SD4.0/SDIO4.0/eMMC4.51 and SD3.0/SDIO3.0/eMMC4.51 Host Controller IP.
JEDEC published JESD84-B451: Embedded MultiMediaCard (eMMC), Electrical Standard (Version 4.51) in June 2012. Continuing the evolution of eMMC as an industry-leading memory standard for embedded non-volatile storage of system code, software applications and user data, the new v4.51 is a replacement of v4.5.
Arasan’s SD4.0/SDIO4.0/eMMC4.51 and SD3.0/SDIO3.0/eMMC4.51 Host Controller IP handles all of the timing and interface protocol requirements to access these media as well as processing the commands in hardware thereby scaling in both performance and access speeds. The IP supports connection to a single slot and performs multi-block writes and erases that lower access overhead. In addition, a host can utilize this IP to boot directly from an attached eMMC memory, thereby simplifying system initialization during power up. The host interface is based on a standard 32-bit AXI bus which is used to transfer data and configure the IP.
JESD84-B451 eMMC v4.51 contains errata corrections and clarifications of the v4.5 standard, adds details of the power supply requirements for e2MMC, defines pass through commands for extended security protocols, and brings back the definitions of Secure Trim and Secure Erase functionality that were previously removed from the eMMC v4.5 standard for legacy backward compatibility, while maintaining the more favorable new alternate functions of Sanitize and Discard (introduced in v4.5) that allow improved performance and support of secure applications. Other than the changes described above, eMMC v4.51 maintains all functionality of the eMMC v4.5 standard, which focuses on improving the interaction between the host processor and the memory device at the interface, configuration and protocol level, resulting in potential gains in overall system reliability.
Availability
Arasan’s SD3.0/SDIO3.0/eMMC4.51 and SD4.0/SDIO4.0/eMMC4.51 Host Controller IP are available immediately for licensing, including Verilog HDL of the IP Core, Verification IP, synthesis scripts, and documentation.
About Arasan
Arasan Chip Systems is a leading provider of Total IP Solutions for mobile storage and connectivity applications. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP cores, analog PHY interfaces, verification IP, hardware verification kits, protocol analyzers, software stacks and drivers, and optional customization services for MIPI, USB, SD, SDIO, MMC/eMMC, CF, UFS, xD and many other popular standards. Arasan’s Total IP products serve system architects and chip design teams in mobile, gaming and desktop computing systems that require silicon-proven, validated IP, delivered with the ability to integrate and verify both digital, analog and software components in the shortest possible time with the lowest risk.
Unlike many other IP providers, Arasan’s Total IP Solution encompasses all aspects of IP development and integration, including analog and digital cores, hardware development kits, protocol analyzers, validation IP and software stacks and drivers and optional architecture consulting and customization services. Based in San Jose, CA, USA, Arasan Chip Systems has a 16 year track record of IP and IP standards development leadership.
About eMMC
Designed for a wide range of applications in consumer electronics, mobile phones, handheld computers, navigational systems and other industrial uses, eMMC is an embedded non-volatile memory system, comprised of both flash memory and a flash memory controller, which simplifies the application interface design and frees the host processor from low-level flash memory management. This benefits product developers by simplifying the non-volatile memory interface design and qualification process – resulting in a reduction in time-to-market as well as facilitating support for future flash device offerings. Small BGA package sizes and low power consumption make eMMC a viable, low-cost memory solution for mobile and other space-constrained products.
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