Digital Blocks Extends the DB9000 TFT LCD Controller IP Core Family with Support for Quad Full High Definition (QFHD) LCD Panels
Building on expertise with Full HD 1920x1080 LCD panels, Digital Blocks supports the video / graphics requirements of 3840 x 2160 QFHD LCD panels in customized ASIC, ASSP, and FPGA solutions.
GLEN ROCK, New Jersey, Sept 4, 2012 – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers with Embedded Processor & Peripherals, Networking, Display Controller, Display Link Layer, 2D Graphics, and Audio / Video processing requirements, today announces the DB9000AXI-QFHD LCD Controller IP Core. The DB9000AXI-QFHD is a synthesizable Verilog IP Core targeting 3840 x 2160 QFHD LCD panels in QFHD-TV, Signage, Gaming, Broadcasting, Aerospace / Defense, Medical, & Industrial applications.
The DB9000AXI-QFHD LCD Controller IP Core contains the following features for QFHD panels:
- A Video Acquisition Engine of up to 17 video / graphics pixel processing streams with alpha blending
- AMBA AXI3 / AXI4 on-chip interconnect for connection to high bandwidth frame buffer memory, with an ARM host processor
- Output Formatter with the capability to drive the requirements of high-bandwidth QFHD panel interfaces
- Interface to LVDS, HDMI, DVI, & DisplayPort Transmitters
Price and Availability
The DB9000AXI-QFHD is available immediately in synthesizable Verilog, along with a simulation test bench with expected results, datasheet, and user manual. For further information, product evaluation, or pricing, please go to Digital Blocks at http://www.digitalblocks.com
DB9000 Family of TFT LCD Controllers
The DB9000 family of TFT LCD Controllers supports a variety LCD panel resolutions, color depths, bus interfaces to frame buffer memory and processors. Please consult Digital Blocks web site for a complete listing.
About Digital Blocks
Digital Blocks designs silicon-proven IP cores for technology systems companies, reducing customer’s development costs and significantly improving their time-to-volume goals. Digital Blocks is located at 587 Rock Rd, Glen Rock, NJ 07452 (USA). Phone: +1-201-251-1281; eFax: +1-702-552-1905; Media Contact: info@digitalblocks.com; Sales Inquiries: info@digitalblock.com; On the Web at www.digitalblocks.com
|
Digital Core Design Hot IP
Related News
- Digital Blocks Expands the DB9000 TFT LCD Controller IP Core Family with Support for the AMBA AXI4 Interconnect
- Digital Blocks Qualifies the DB9000 TFT LCD Controller IP Core Family for High Resolution Medical, Industrial, Monitor, and Cinema Applications
- Digital Blocks Extends the DB9000 TFT LCD Controller IP Core Family with the availability of the DB9000AXI for the AMBA 3.0 Interconnect
- Digital Blocks Extends the DB9000 TFT LCD Controller IP Core Family with the availability of the DB9000OCP for the Open Core Protocol 2.2 Interconnect
- Digital Blocks Extends the DB9000 TFT LCD Controller IP Core Family with the availability of the DB9000AHB for the AMBA 2.0 Interconnect
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |