Mentor Graphics Consulting Organization Builds on Verification Expertise through Agreement with TransEDA
WILSONVILLE, Ore., May 1, 2002 - Mentor Graphics Corporation (Nasdaq: MENT) today announced a partnership agreement with TransEDA®, a leader in ready-to-use verification solutions for electronic designs, that provides Mentor Consulting with access to TransEDA's coverage analysis and HDL checking tools. Part of Mentor's expanded focus on consulting for functional verification, this agreement allows its consultants to build on their expertise and develop and test new flows and methodologies that are deployed for Mentor's customers.
As the complexity of SoC (system-on-chip), ASIC (application-specific integrated circuit) and FPGA (field-programmable gate array) designs has continued to increase, verification processes have also become more complex. Today companies are finding that verification accounts for as much as 80 percent of the design process. Recognizing the need for improved verification solutions, Mentor delivers methodology consulting on all aspects of the verification process. In order to help companies ensure higher quality and better predictability of design performance through the management of verification, Mentor Consulting is expanding on its expertise by testing and developing new methodologies and flows and training its consultants on the best tools available.
"Verification is becoming the largest concern facing our customers and success requires both good tools and effective methodologies," said Phil Bishop, vice president and general manager of Mentor's Consulting division. "In order to help our customers establish the best possible methodologies, we must continually build on our knowledge of best-in-class tools that have a synergistic relationship with Mentor's offerings."
"Mentor's consulting organization is well-respected in the industry for the knowledge and expertise of its consultants," said Tom Borgstrom, vice president of marketing, TransEDA. "Mentor's consultants now have access to our best-in-class tools so they can help our common customers design and implement leading-edge verification methodologies."
Mentor Consulting sought access to TransEDA's VN-Check™ configurable HDL checking and VN-Cover™ coverage analysis tools because checking and coverage help engineers find bugs faster and TransEDA's solutions are ready to use with a wide variety of design and verification environments, including Mentor's industry-leading verification tools. VN-Check provides hundreds of design checks in predefined or user-created rules sets that uncover Verilog and VHDL design and coding problems before simulation. The leading coverage analysis tool in the industry, VN-Cover supports Verilog, VHDL and dual-language simulation to provide objective feedback on the state of verification with a variety of code and finite state machine (FSM) coverage metrics. VN-Cover is compatible with all of the leading simulators, including Model Technology's ModelSim® tool from Mentor Graphics®.
In addition to verification, Mentor Consulting also partners with TransEDA in the area of IP qualification. Mentor Consulting will integrate tools such as VN-Cover into its IP qualification services. These services offer customers a comprehensive solution for measuring IP quality based on industry standards and best practices.
About TransEDA
TransEDA PLC (symbol TRA on the Alternative Investment Market of the London Stock Exchange) develops and markets ready-to-use verification solutions for electronic FPGA, ASIC, and SoC designs. The company's verification IP library includes models and properties for advanced microprocessors and bus interfaces. TransEDA's design verification software performs dynamic property checking, application-specific test automation, configurable HDL checking, code and FSM coverage analysis, and test suite analysis. TransEDA's tier-1 list of customers includes 18 of the world's top 20 semiconductor vendors. For more information, visit www.transeda.com or contact TransEDA at 983 University Avenue, Building C, Los Gatos, Calif. 95032 U.S.A., telephone (408) 335-1300, fax (408) 335-1319, email info@transeda.com.
About Mentor Consulting
Mentor Consulting is the leader in worldwide semiconductor intellectual property services and maintenance and a provider of innovative solutions addressing today's design and verification challenges. The company's infrastructure and methodology solutions for SoC design, board process, system verification and design reuse are used worldwide by forward-looking electronics companies to optimize their design productivity and advance adoption of the latest industry design best practices. For more information on these and other services and products email Mentor Consulting at mentor_consulting@mentor.com or visit www.mentor.com/consulting.
About Mentor Graphics
Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $600 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.
###
For more information, please contact: | |
Leanne White Mentor Graphics 503.685.1984 leanne_white@mentor.com | Emily Taylor Weber Shandwick 503.552.3733 etaylor@webershandwick.com |
Related News
- Mentor Graphics Signs Multi-year Agreement with ARM for Early Access to ARM IP to Accelerate SoC Verification, Implementation and Testing
- IPextreme Extends Reach Through Mentor Graphics
- Mentor Graphics expands formal verification's reach with new cross-platform GUI and apps for sequential logic equivalence checking and CDC gate-level analysis
- Silicon Creations Selects Mentor Graphics Software for High-Performance Analog and Mixed-Signal IP Verification
- Synopsys Extends Verification FastForward Program, Enabling Cadence Incisive and Mentor Graphics Questa Users to Adopt VCS Simulation with Fine-Grained Parallelism Technology
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |