M31 Technology Joins TSMC IP Alliance
TAIWAN, HSINCHU –December 19, 2012 - M31 Technology announced today that it has joined the TSMC IP Alliance. In addition, M31 announced its USB 3.0 PHY (physical layer) IP passed the high and low temperature tests and reliability verification for TSMC’s 40nm process, and completed the TSMC9000 quality assessment. The TSMC9000 library and IP quality management program mandates a set of quality requirements to be met before devices can be listed in TSMC’s IP catalog.
M31 Technology develops proprietary 40nm USB 3.0 PHY IP using core devices and 1.8V I/O devices. The IP supports all super-speed, high-speed, full-speed and low-speed functions for USB3.0/USB2.0, and meets the USB-IF compliance test standard. To promote manufacturing efficiency, mask layers can be reduced as the IP does not require multiple I/O devices.
“Through this collaboration, customers can design in M31’s high performance IP on TSMC’s advanced technology process," said H.P. Lin, Chairman of M31 Technology.
"We welcome M31 to TSMC IP Alliance program," said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division." This useful addition of important standard technologies brings greater choice and flexibility to our customers."
M31 is planning to introduce additional IP solutions in advanced process nodes, including 28nm, in 2013.
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M31 Technology Corp. Hot IP
USB 3.2 Gen2/Gen1 PHY IP in TSMC(5nm, 6nm, 7nm,12nm/16nm, 22nm, 28nm, 40nm, 55nm ...
PCIe 4.0 PHY in TSMC(6nm,7nm,12nm,16nm)
MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and ...
MIPI D-PHY RX/TX v1.1 / v1.2 IP in TSMC (12/16nm, 28nm, 40nm, and 55nm process)
SerDes PHY IP(12nm, 14nm, 22nm, 28nm)
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