Accellera Systems Initiative completes SystemC AMS 2.0 standard for mixed-signal design of electronic systems
Industry drives extensions, Language Reference Manual now available
GRENOBLE, France -- March 20, 2013 – Accellera Systems Initiative, an independent non-profit organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards for design and verification, today announces completion of the SystemC® Analog /Mixed-Signal (AMS) 2.0 extensions. SystemC AMS 2.0 is an industry-driven mixed-signal standard for electronic system-level design. The SystemC AMS 2.0 language reference manual (LRM) is available for download under SystemC open-source license at www.accellera.org.
The AMS 2.0 standard is fully compatible with the latest release of the SystemC standard, IEEE Std. 1666™-2011. The update of the AMS extensions contains additional features to model dynamic and reactive mixed-signal behavior at high levels of abstraction. New semantics and language constructs complement the standard to address modeling accuracy, fidelity and speed for efficient mixed-signal system-level design. The release incorporates updates from the public review conducted in 2012.
“With completion of the SystemC AMS 2.0 standard, Accellera Systems Initiative shows its ambition to shape unique standards for mixed-signal applications,” said Shishpal Rawat, chair of Accellera Systems Initiative. “We appreciate the outstanding efforts of the European semiconductor companies, research institutes and academic partners involved in the SystemC AMS working group to create this industry-driven standard.”
A main feature of the updated SystemC AMS 2.0 standard is the introduction of dynamic features for the Timed Data Flow (TDF) model of computation, the abstract modeling style introduced in SystemC AMS 1.0. Concepts such as variable and event-triggered time steps, data rates and delays that enable more efficient and even faster simulation performance make SystemC AMS an excellent language for the creation of SystemC-centric mixed-signal virtual prototypes.
“With SystemC AMS 2.0 we have defined a compelling system-level mixed-signal modeling standard essential to the design of heterogeneous embedded systems where analog, digital and software functionality comes together,” said Martin Barnasconi, chair of the SystemC AMS Working Group. “As evidenced by the growing industry support, I’m confident that SystemC AMS will emerge soon in advanced system-level design tools and flows to tackle the development challenges of complex mixed-signal ICs and systems.”
Various industries have expressed their ongoing support and appreciation for the release of SystemC AMS 2.0. Find out more in the industry quote sheet.
SystemC AMS working group members will continue to work on the user’s guide and to document all new capabilities of the SystemC AMS language, including examples and detailed explanations of the modeling features. Periodic updates in workshops and tutorials at various conferences will be made over the year, including the 2013 Design Automation and Test in Europe (DATE) conference. Presentations at DATE include the European SystemC Users Group (ESCUG) Meeting to be held on March 19 and a workshop on March 22 entitled “ESL - Putting the Pieces Together: Integrating SystemC Design and Verification with AMS and Algorithm Design.”
About Accellera Systems Initiative
Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development, and as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. For membership information, please email membership@accellera.org.
|
Related News
- Accellera Systems Initiative Enhances IP-XACT Standard with New Vendor Extensions for Analog/Mixed-Signal and Low-Power Designs
- Accellera Systems Initiative Announces IEEE 1666 SystemC Language Standard for Electronic System-Level Design Is Available for Download at No Charge
- OSCI Welcomes Adoption of SystemC AMS 1.0 Standard Inside Industrial Design Flows for Mixed-Signal System Design
- OSCI Completes First Analog/Mixed-Signal Standard for SystemC-based Design
- Accellera Systems Initiative advances the SystemC ecosystem with a new core language library
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |