Brite's USB 2.0 OTG PHY Implementation Using SMIC 0.11um Process Receives USB-IF Certification
SHANGHAI, April 08, 2013 -- Brite Semiconductor (Shanghai) Corporation, a leading IC design and turnkey service provider, today announced that its USB 2.0 physical layer (PHY) implementation, using SMIC 0.11um process, has passed USB-IF certification for Hi-Speed products. This newly implemented PHY is fully compliant with on-the-go (OTG) specification for both device and host applications. It can be adopted by all USB 2.0 compliant products, from the bridge application in data storage to SoC integration in mobile devices.
In order to reduce power consumption and size, while achieving higher performance, Brite has made significant and innovative improvements on critical modules such as PLL, I/O, etc. Based on the same design improvement, USB PHY implementation using SMIC’s 55nm process will be introduced later this year. Brite also will commence development of USB PHY implementation on 40nm based on SMIC’s process platform.
Dr. TY Chiu, CEO of SMIC said: “Although USB 3.0 was introduced some years ago, USB 2.0 is still the dominant device interface in the current market. Quality and reliability are built into Brite’s design process. Brite’s certified USB 2.0 OTG PHY USB-IF demonstrates their dedication to improve chip quality and reliability while pursuing higher performance with lower cost. We look forward to working with Brite to launch more high-quality technology projects in the future.”
"USB is ubiquitous, and is the most essential interface for both consumer and industrial products,” said Dr. Charlie Zhi, President and CEO of Brite Semiconductor. “Brite is committed to the development of high-speed interface IP and highly integrated USB PHY solutions based on SMIC’s advanced processes, I am pleased to announce that our USB 2.0 PHY implementation using SMIC 0.11um process has passed the USB-IF certification. This is another milestone in our IP roadmap. Brite can provide customers with certified and reliable USB PHY with high performance, ensuring the quality of customers’ ASIC products."
About Brite Semiconductor
Brite Semiconductor is a world-leading ASIC design services company, providing customers with ULSI ASIC/SoC chip design and manufacturing services. Brite Semiconductor was co-founded by Semiconductor Manufacturing International Corporation and Open-Silicon, as well as venture capital firms from China and abroad. As the strategic partners, SMIC and Open-Silicon provide Brite Semiconductor with strong technical and manufacturing support. Targeted at 90nm/65nm/40nm and high-end SoC design services, Brite Semiconductor provides flexible turn-key service from RTL/netlist to chip delivery, and seamless, low-cost, and low-risk solutions to customers. For more information, please refer to the Brite Semiconductor website: www.britesemi.com.
|
Brite Semiconductor Hot IP
Related News
- Synopsys USB 2.0 PHY IP for Advanced 40-Nanometer Process First to Pass USB-IF Certification
- ChipX Announces USB-IF Compliance Certification for USB 2.0 HS OTG PHY in Structured ASIC
- GOWIN Semiconductor USB 2.0 PHY Interface and Device Controller IPs Achieve USB-IF Certification
- Synopsys DesignWare USB 2.0 NanoPHY and PCI Express PHY IP Achieve Compliance in SMIC's 130-NM Process Technology
- Faraday's USB 2.0 OTG IP Cores Receive USB-IF OTG Compliance Certifications
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |