Microsemi Achieves NIST Certification on EnforcIT Cryptography IP Cores for FPGA and ASIC Designs

Secures Critical Data with DOD Grade U.S.-Developed Suite B Cryptography

ALISO VIEJO, Calif. -- April 12, 2013 --Microsemi Corporation, a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, announced it has achieved National Institute of Standards and Technology (NIST) algorithmic certification on its U.S.-developed EnforcIT™ Cryptography Suite of National Security Agency (NSA) Suite B algorithms.

The EnforcIT Cryptography Suite contains intellectual property (IP) cores for the Advanced Encryption Standard (AES), the XTS-AES Tweakable Block Cipher, Elliptic Curve Cryptography (ECC), and the Secure Hashing Algorithm (SHA-2) with HMAC. These cryptography cores support multiple key sizes and block cipher modes. In addition, the highly configurable cores address security, area and throughput needs on all standard SRAM FPGAs, flash-based FPGAs and ASICs.

"Microsemi has a long track record of providing cryptography products that deliver outstanding security and value to the United States government and Department of Defense," said Charlie Leader , vice president at Microsemi. "Earning this important certification for our EnforcIT Cryptography Suite is yet another step forward in our quest to provide increasingly secure, industry-qualified solutions that meet or exceed our customers' critical data needs."

"NIST algorithmic certification ensures that our NSA Suite B cryptography cores meet the strictest standards," said Michael Mehlberg , vice president of product management at Microsemi. "As a result, we can now offer our customers further assurance that their critical data is safely stored and transmitted when integrated into an FPGA or ASIC design."

Microsemi's EnforcIT Cryptography Suite includes many of the key sizes, operating modes and features expected in a full NSA Suite B cryptography algorithmic implementation. Specifically, the AES core provides 128, 192 and 256-bit key size support in CBC, CFB, OFB and CTR block cipher modes. The ECC core is an elliptic curve arithmetic unit with support for elliptic curve digital signature algorithms (ECDSA) on 256-bit prime fields (384 and 521-bit key sizes can be supported upon request). SHA-2 supports digest computation for 224, 256, 384 and 512-bit digest sizes with bit-length messages. HMAC supports any combination of SHA-2 algorithms, bit-length keys and messages. XTS-AES supports 128, 192 and 256-bit key sizes; whole block ciphering; and provides length-preserving encryption.

The EnforcIT Cryptography Suite is designed for flexibility in speed and security, and now provides higher assurance with NIST algorithmic certification. All IP cores are designed for low-risk integration into nearly all standard SRAM or flash-based FPGAs, and could be instantiated into an ASIC design. These and other Microsemi cryptography products including WhiteboxCRYPTO™ are designed and built in the U.S. in Microsemi's trusted facility located in Phoenix, Ariz. and in West Lafayette, Ind.

EnforcIT Cryptography Suite Key Features:

• NIST-certified AES supporting 128-bit, 192-bit and 256-bit keys, encryption and decryption with CBC, CFB, CTR and OFB block cipher modes
• NIST-certified ECC P-256 key validation and verification
• NIST-certified SHA-2 224-bit, 256-bit, 384-bit and 512-bit hashing with support for HMAC
• NIST-certified XTS-AES supporting 128-bit, 192-bit and 256-bit keys; encryption and decryption; and whole block length-preserving ciphering
• User-configurable cryptography cores to balance security, area and throughput
• Additional security measures built into the cryptographic implementations to prevent tampering and reverse engineering

The EnforcIT Cryptography Suite was validated by InfoGard Laboratories, Inc. and certified by the NIST. The certification is expected to be posted to the NIST website later this month:

• http://csrc.nist.gov/groups/STM/cavp/documents/aes/aesval.html
• http://csrc.nist.gov/groups/STM/cavp/documents/shs/shaval.htm
• http://csrc.nist.gov/groups/STM/cavp/documents/mac/hmacval.html
• http://csrc.nist.gov/groups/STM/cavp/documents/dss/ecdsaval.html

Microsemi has full design, manufacture and test capabilities for a wide variety of multiple component packages (MCPs), commercial-off-the-shelf (COTS) memory, microprocessors, FPGA designs, secure software engineering and a combination MCPs for demanding applications. These microelectronic products can also be ruggedized and processed for tamper resistance. All devices are subjected to extensive environmental and temperature testing. Microsemi's maintains a DMEA accredited facility in Phoenix, Ariz. for assembly and test and a U.S. only facility in West Lafayette, Ind. for systems security engineering. Its quality and inspection system requirements are certified to MIL-PRF-38534 Class H and K, MIL-PRF-38535 Class Q, ISO 9001:2008 and AS9100. For more information call 765-775-1004.

About Microsemi

Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for communications, defense & security, aerospace and industrial markets. Products include high-performance, radiation-hardened and highly reliable analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and voice processing devices; RF solutions; discrete components; security technologies and scalable anti-tamper products; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, Calif., and has approximately 3,000 employees globally. Learn more at www.microsemi.com.

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