Toshiba taps inSilicon's USB 2.0 core for system-on-chip designs
Toshiba taps inSilicon's USB 2.0 core for system-on-chip designs
By Semiconductor Business News
October 22, 2001 (12:41 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011022S0060
SAN JOSE --Intellectual property design core provider inSilicon Corp. today announced it has licensed its Universal Serial Bus (USB) 2.0 host communications core to Toshiba Corp.'s semiconductor group. Toshiba plans to use the USB 2.0 technology in complex system-on-chip designs. The deal comes after Toshiba's successful implementation of designs using inSilicon's USB 1.1 technology, said Kiyofumi Ochii, general manager of Toshiba's System LSI Design Division. Terms of the licensing pact were not released. The optimized USB 2.0 host technology will enable Toshiba to "reduce development costs and bring their advanced technology products to market sooner," said Barry Hoberman, chief operating officer of San Jose-based inSilicon.
Related News
- Mentor Graphics and Gain Technology Deliver the First Complete USB 2.0 IP Reference Solution for System-on-Chip Designs
- Hitachi Expands SOC Capabilities with inSilicon's Hi-Speed USB 2.0 PHY
- inSilicon Inks Pact with Agilent to Provide Certified Hi-Speed USB 2.0 PHY for SOC Designs
- inSilicon's Certified USB 2.0 PHY is the Connectivity Choice For Oak Technology's Advanced Imaging
- AMD Selects inSilicon's USB 2.0 Transceiver IP For Future Chips
Breaking News
- MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
- MIPI Alliance Announces Board Leadership Appointments
- Alphawave Semi Q4 2024 Trading and Business Update
- ST-GloFo fab plan shelved
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Altera Launches New Partner Program to Accelerate FPGA Solutions Development
- Electronic System Design Industry Posts $5.1 Billion in Revenue in Q3 2024, ESD Alliance Reports
- Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
- YorChip announces patent-pending Universal PHY for Open Chiplets
E-mail This Article | Printer-Friendly Page |