Toshiba taps inSilicon's USB 2.0 core for system-on-chip designs
Toshiba taps inSilicon's USB 2.0 core for system-on-chip designs
By Semiconductor Business News
October 22, 2001 (12:41 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011022S0060
SAN JOSE --Intellectual property design core provider inSilicon Corp. today announced it has licensed its Universal Serial Bus (USB) 2.0 host communications core to Toshiba Corp.'s semiconductor group. Toshiba plans to use the USB 2.0 technology in complex system-on-chip designs. The deal comes after Toshiba's successful implementation of designs using inSilicon's USB 1.1 technology, said Kiyofumi Ochii, general manager of Toshiba's System LSI Design Division. Terms of the licensing pact were not released. The optimized USB 2.0 host technology will enable Toshiba to "reduce development costs and bring their advanced technology products to market sooner," said Barry Hoberman, chief operating officer of San Jose-based inSilicon.
Related News
- Mentor Graphics and Gain Technology Deliver the First Complete USB 2.0 IP Reference Solution for System-on-Chip Designs
- Hitachi Expands SOC Capabilities with inSilicon's Hi-Speed USB 2.0 PHY
- inSilicon Inks Pact with Agilent to Provide Certified Hi-Speed USB 2.0 PHY for SOC Designs
- inSilicon's Certified USB 2.0 PHY is the Connectivity Choice For Oak Technology's Advanced Imaging
- AMD Selects inSilicon's USB 2.0 Transceiver IP For Future Chips
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |