Cochlear Adopts Target's Optimizing C Compiler Technology for its Ultra-Low Power Hearing Implant DSP
50th Design Automation Conference – Austin, Texas, June 4, 2013 -- Target Compiler Technologies, a leading provider of software tools for the design of processor-laden SoCs, today announced that Cochlear Ltd. (ASX: COH) has engaged with Target as its supplier of a complete software development kit (SDK) for its NEO ultra-low power digital signal processor (DSP). The NEO chip is the technology cornerstone of Cochlear’s new Nucleus® 6 cochlear implant system that was recently announced at the European Peadiatric Symposium on Cochlear Implants (EPSCI) in Istanbul, enabling advanced functionality such as SmartSound® iQ and true wireless audio streaming.
The NEO DSP is a very-long instruction word (VLIW) processor optimized for ultra-low power sound processing, deployed in Cochlear’s multi-processor platform chips for cochlear implants. To accelerate the development of future audio algorithms on this platform, Cochlear identified the need for an advanced SDK including an optimizing C compiler, instruction-set simulator and debugger. Cochlear first used Target’s IP Designer™ tool-suite to model the NEO DSP’s instruction-set architecture and validate the performance of Target’s C compiler and instruction-set simulation technology. Next, a processor-specific SDK was generated from this model. The resulting IP Programmer™ SDK for NEO is now in production use by Cochlear’s advanced sound processing research and development teams.
“Cochlear has been using ultra-low power programmable DSP technology in its sound processor products for a long time,” commented Carl Van Himbeeck, General Manager of Cochlear’s Technology Center in Mechelen, Belgium, where the NEO DSP platform was jointly developed together with NXP Semiconductor. “Our DSP enables continuous algorithmic innovation, which improves the hearing experience and quality of life of patients with cochlear implants."
Van Himbeeck explained the rationale for its collaboration with Target: “Previously, the NEO DSP was directly coded in low-level assembly code which was very power efficient but had a steep learning curve. We have been looking for an efficient C compiler to improve our design productivity. Target’s reputation of excellence in C compiler technology for DSPs and its track record as a supplier to the hearing instrument industry were key reasons to engage with them."
“Efficient compilation on a parallel DSP, constrained by a low memory footprint and targeting ultra-low power operation is a significant challenge,” said Erika Van Baelen, platform manager at Cochlear’s Technology Center. “Nonetheless, we could demonstrate that Target’s C compiler technology delivered code quality comparable to hand-optimized assembly code. As a result, the new C compiler has been adopted quickly by our algorithmic developers worldwide,” Van Baelen continued.
“Today’s announcement marks an important step in the adoption of our design technology for ultra-low power medical products,” said Gert Goossens, CEO of Target. “Whereas our tools are being used by a growing number of device and chip makers for personal health care and external hearing instrument products, this is our first engagement with a key player in medical implantable devices. We are happy to contribute to design and programming of ultra-low power programmable platforms that are at the heart of exciting new medical products improving people’s life,” Goossens said.
About Cochlear
Cochlear is the global leader in implantable hearing solutions. It has a dedicated global team of more than 2,500 people who deliver the gift of sound to the hearing impaired in over 100 countries. Its vision is to connect people, young and old, to a world of sound by offering life enhancing hearing solutions.
Cochlear’s promise of “Hear now. And always” embodies the company’s commitment to providing its recipients with the best possible hearing performance today and for the rest of their lives. For 30 years Cochlear has helped more than a quarter of a million people either hear for the first time or reconnect them to their families, friends, workplaces and communities.
About cochlear implants
Cochlear implants are a safe and effective treatment for severe to profound hearing loss. A cochlear implant is a technological device that bypasses the damaged hair cells and stimulates the hearing nerve directly, providing useful hearing and improved communication abilities to the implant user.
About Target Compiler Technologies
Target Compiler Technologies offers software tools for the design of advanced multicore systems-on-a-chip (SoCs). Target’s IP Designer™ product is the leading tool-suite that enables and accelerates the design, programming and verification of application-specific processor cores (ASIPs). Target’s MP Designer™ product is a tool-suite for software parallelization on multicore SoC architectures. These tools are ideally suited for SoC designs in markets that mandate low silicon cost, low energy consumption, and flexibility to accommodate post-manufacturing changes. Target’s tools have been used by customers around the globe to design SoCs for wireless systems (e.g. 3G/4G handsets, access points, VOIP phones), audio/video/image/graphics processing, automotive systems, industrial control, security, network infrastructure, hearing instruments, and personal healthcare systems. Target is a spin-off of IMEC, is headquartered in Leuven, Belgium, with North American operations in Boulder, Colorado. For more information, visit http://www.retarget.com.
|
Related News
- GN ReSound Develops Wireless Protocol Stack for Next-Generation Hearing Instruments, using Target's Optimizing C Compiler Technology
- iFLYTEK On-Device Speech Recognition Software Now Available For CEVA's Ultra-Low Power Audio/Voice DSPs
- MegaChips Adopts Omni Design's Ultra-Low Power Analog-to-Digital Converter Front-Ends for Next-Generation Communication Networks
- Ceva Bluetooth Low Energy and 802.15.4 IPs Bring Ultra-Low Power Wireless Connectivity to Alif Semiconductor's Balletto Family of MCUs
- LeapMind's "Efficiera" Ultra-low Power AI Inference Accelerator IP Was Verified RTL Design for ASIC/ASSP Conversion
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |