NVM OTP NeoBit in GLOBALFOUNDRIES (350nm, 250nm, 180nm, 160nm, 150nm, 130nm, 110nm, 65nm, 55nm)
TSMC Expands Collaboration with Cadence on Virtuoso Custom Design Platform
SAN JOSE, Calif. -- Jul 8, 2013 -- In an effort to address the increasing complexity associated with advanced node designs, Cadence Design Systems, Inc. (NASDAQ: CDNS), today announced that TSMC has expanded collaboration with Cadence on the Virtuoso custom and analog design platform to design and verify its own cutting-edge IP. Additionally, TSMC has extended its native SKILL-based process design kits (PDKs) portfolio to 16 nanometers, creating and delivering fully qualified and high-quality native SKILL-based PDKs to enable all the leading-edge features of the Virtuoso platform. To allow customers to fully maximize performance and quality of results, the new PDKs enable leading-edge features within the Virtuoso 12.1 platform, such as auto-alignment, automatic handling of complex rules during abutment, chaining devices, support of color-aware layout, and advanced routing.
“We have continued our major investments in advancing the Virtuoso platform to address the ever mounting design challenges. We worked closely with TSMC and our customers to enhance and deliver on advanced node and mainstream design requirements,” said Dr. Chi-Ping Hsu, senior vice president, research and development, Silicon Realization Group at Cadence. “The high-quality native SKILL-based PDKs are key to powering up the Virtuoso methodologies to their full potential.”
“We have a long-term partnership with Cadence on the Virtuoso platform,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “The extension of SKILL-based PDK development to 16 nanometers allows us to better address customers’ needs in custom design of advanced technologies.”
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
|
Cadence Hot IP
Related News
- Cadence Expands Collaboration with Samsung Foundry, Providing Differentiated Reference Flows Based on the Integrity 3D-IC Platform
- Cadence's New Flow Automates Custom/Analog Design Migration on TSMC Advanced Technologies
- Cadence Expands Collaboration with TSMC and Microsoft to Accelerate Timing Signoff for Giga-Scale Designs on the Cloud
- Cadence Expands Virtuoso Platform with Enhanced System Design, Advanced Node Support down to 5nm, and Simulation-Driven Layout
- Cadence Expands Collaboration with ARM to Accelerate Custom SoC and IoT System Designs with Industry's First End-to-End Hosted Design Solution
Breaking News
- intoPIX Powers Ikegami's New IPX-100 with JPEG XS for Seamless & Low-Latency IP Production
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
- Qualcomm initiates global anti-trust complaint about Arm
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- SiliconIntervention Announces Availability of Silicon Based Fractal-D Audio Amplifier Evaluation Board
Most Popular
- Qualcomm initiates global anti-trust complaint about Arm
- Siemens acquires Altair to create most complete AI-powered portfolio of industrial software
- Alphawave Semi Reveals Suite of Optoelectronics Silicon Products addressing Hyperscaler Datacenter and AI Interconnect Market
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- Rapidus Announces Strategic Partnership with Quest Global to Enable Advanced 2nm Solutions for the AI Chip Era
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |