Cadence Incisive Platform Cuts Fujitsu Semiconductor’s Regression Verification Time By 3X
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, announced today that Fujitsu Semiconductor Limited has reduced the regression verification time for a system-on-chip (SoC) design by 3X using the Incisive® Enterprise Simulator and the Incisive Enterprise Manager. Part of the Cadence® System Development Suite, the Incisive functional verification platform delivers unique verification management and automation capabilities that tackle the complexities of SoC verification.
Incisive Enterprise Simulator enabled Fujitsu engineers to separately elaborate the design and testbench and then simply link the proper configuration for each test, allowing them to achieve faster regression simulation. Simulator runtime performance improved 1.5X for each test when compared to an earlier version of the simulator, and the application of a compression algorithm reduced simulation data size by more than 30X.
The powerful verification management capabilities of Incisive Enterprise Manager enabled Fujitsu to automate the permutations and combinations of design and testbench components typical in functional verification projects. The verification session input format (VSIF) file within Incisive Enterprise Manager was employed to precisely control and manage the simulation execution. As a result, the team eliminated error-prone manual configuration processes.
“Cadence greatly improved our productivity and predictability for SoC verification,” said Masahiro Yoshida, Network SoC Design department manager for High Performance SoC Solutions Division, the Advanced Products Business Unit of Fujitsu Semiconductor Limited. “We had high verification performance requirements for our leading-edge communication processing LSI. Working closely with Cadence experts, we exceeded those requirements on this project and plan to improve our efficiency further by applying the latest Incisive features in future projects.”
“Innovative SoC verification combines tools, methodology and know-how,” said Dr. Chi-Ping Hsu, senior vice president, Silicon Realization Group at Cadence. “Cadence Incisive tools and methodologies help our customers improve efficiency. We deliver those tools with the most talented R&D and field engineering teams in the world who are committed to customer success.”
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
|
Cadence Hot IP
Related News
- Digital Media Professionals Uses Cadence Palladium XP Verification Computing Platform and Hosted Design Solutions to Speed Time to Market
- Cadence Incisive Specman Elite Testbench Reduces Verification Time for Sharp by 50 Percent
- Cadence Incisive 13.2 Platform Sets New Standard for SoC Verification Performance and Productivity
- New Release of Cadence Incisive Platform Doubles Productivity of SoC Verification
- Cadence C-to-Silicon Compiler Supported in Fujitsu Semiconductor’s ASIC Flow for System Realization
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |