English
The S5 Series offers 64-bit RISC-V performance with 32-bit power and area
Group Describes Specs for x86, ARM SoCs
Rick Merritt, EETimes
8/26/2013 01:00 AM EDT
SAN JOSE, Calif. — Engineers got their first public look at work-in-progress on an open specification for programming processors using a variety of different kinds of cores. The Heterogeneous Systems Architecture Foundation (HSA) gave a half-day tutorial at the Hot Chips conference here on a set of specs it aims to release in mid-2014.
The HSA specs initially aim to let graphics cores act as equal citizens on an SoC with host processor cores, sharing features such as a common pool of coherent memory. They will evolve to include other kinds of cores such as DSPs, codecs, DMA engines, and other accelerators in the future.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related News
- Mentor Nucleus RTOS extends system reliability for Arm Cortex v8-A 64-bit processors on multicore SoCs
- Qualcomm Details ARM Server SoCs
- New ARM CoreLink System IP Provides the Foundation for Next-Generation Heterogeneous SoCs
- Synopsys Extends Performance Exploration Solution for ARM AMBA 4 Interconnect-based Multicore SoCs
- Xilinx and OmniTek Launch the Era of All Programmable SoCs for Broadcast Equipment Makers at IBC 2012
Breaking News
- Cortus MINERVA Out-of-Order 4GHz 64-bit RISC-V Processor Platform targets automotive applications
- Quadric Announces Lee Vick is New VP Worldwide Sales
- Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results