Altera Releases Industry's First Fully Programmable SONET/SDH Solution Supporting up to OC-48 Levels
Altera's SONET/SDH Solution Speeds Time-to-Market for Optical Network Applications
San Jose, Calif., June 3, 2002 -- Altera Corporation (Nasdaq: ALTR) today announced the release of its SONET/SDH Compiler, the programmable logic industry's first fully programmable SONET/SDH framing and overhead processing solution for optical networks supporting optical levels up to OC-48. The SONET/SDH Compiler can be used for system-on-a-programmable-chip (SOPC) designs utilizing Altera's Stratix™ and APEX™ II family of programmable logic devices (PLDs), delivering a rapid, cost-effective solution for line rates up to 2.5 Gbps.
"Integrating SONET and other intellectual property (IP) functions in Altera's PLDs allowed us to quickly develop a flexible, reconfigurable SONET framing and overhead processing solution supporting optical levels up to OC-48," said Mike Downs, director of engineering at Adaptive Micro-Ware, an Altera Consultants Alliance Program (ACAPSM) member and user of the SONET/SDH Compiler. "The cost-effectiveness and reduced design times delivered by Altera's SONET solution allows telecom engineers to use programmable logic at even faster SONET rates."
The SONET/SDH Compiler is delivered with Altera's user-friendly MegaWizard® graphical user interface, allowing designers to optimize the IP to meet their exact system needs, reducing unit costs and simplifying the software integration. Altera's OpenCore® free test drive program allows designers to perform functional simulation, place-and-route, and static timing analysis before purchasing the IP.
"Service providers continue to look for cost-effective systems that support the wide range of transport protocols used in today's wide area networks," said Justin Cowling, Altera's director of IP marketing. "Implementing SONET functions with users' proprietary logic leads to highly integrated, flexible system solutions that can be brought to market with the shortest possible design cycle."
About the SONET/SDH Compiler
Altera's SONET/SDH Compiler supports line rates from STS-1/STM-0/AU-3 to STS-48c/STM-16/AU-4-16c, and both STS-1 and STS-3c/STM-1/AU-4 channelization. Altera's ATM Cell Processor Compiler is also available, providing ATM transmission convergence at up to 2.5 Gbps.
The ATM and SONET/SDH cores can be targeted for Altera's recently announced Stratix device family, the industry's largest and fastest PLD. The Stratix device family is based on a 1.5-V, 0.13-µm, all-layer-copper process technology and offers up to 114,140 logic elements (LEs), 10 Mbits of embedded memory, and high-performance I/O capabilities.
For more information on Altera ACAP partner Adaptive Micro-Ware, visit http://www.altera.com/acap/acp-adaptive.html
About Altera
Altera Corporation (Nasdaq: ALTR) is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at http://www.altera.com.
|
Intel FPGA Hot IP
Related News
- Xilinx Enables Next Generation Sonet/SDH Networks With Industry's First Parameterizable OC-192 Generic Framing Procedure Solution
- Altera First to Enable Network Traffic over SONET/SDH with INTEC's FPGA-Optimized Intellectual Property
- IBM rolls out network processors and software for OC-48 networks
- intoPIX Releases New TICO Encoder and Decoder Cores Supporting UHDTV2 and 8K up to 60fps.
- Barefoot Networks Unveils Breakthrough Switching Technology: the World's First Fully Programmable Switches That Also Happen to Be the Fastest Switches Ever Built
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |