Momentum Builds for Assertion-Based Verification: 0-In Welcomes Averant and Bridges2Silicon as Check-In Partners
SAN JOSE, Calif. - June 3, 2002 - 0-In Design Automation, The Assertion-Based Verification Company, today welcomed two new member companies, Averant, Inc. and Bridges2Silicon, Inc., to the growing list of 0-In Check-In Partners. The Check-In Partner Program enables electronic design automation vendors to use 0-In's CheckerWare library and monitors for all the tools in their verification flows so that design teams can leverage 0-In assertions across multiple verification platforms.
The 0-In Check-In Partner Program gives customers of 0-In and Averant the ability to use 0-In assertions across Averant's static formal verification products. Customers of 0-In and Bridges2Silicon will be able to use 0-In assertions in Bridges2Silicon's FPGA rapid prototyping environment.
Check-In Delivers Assertion Interoperability
The 0-In Assertion-Based Verification (ABV) methodology enables customers to use 0-In assertion checkers in their entire verification environment, which includes tools for compiled simulation, simulation acceleration and emulation, test bench suites, formal verification, and rapid prototyping.
"There is growing recognition in the industry that assertion-based verification is the key to SoC success, " said Emil Girczyc, president and CEO at 0-In Design Automation. "An effective assertion-based verification solution requires that all your tools recognize all your assertions. The addition of Averant and Bridges2Silicon to the 0-In Check-In Partner Program expands the ability of EDA design teams to assemble a mix of best-in-class verification methods and tools."
"The 0-In Check-In Partner Program provides interoperable solutions that our customers need," said Averant's vice president of marketing, Behrooz Zahiri. "Using the Averant Solidify™ static formal verification tool and 0-In assertions, engineers quickly and easily prove their block-level implementation by identifying and resolving corner case bugs."
"Both 0-In assertions and the Bridges2Silicon Intelligent In-Circuit Emulator (IICE™) technology provide increased observability and reduce debugging time for design teams using rapid prototyping techniques," said Douglas Perry, founder and head of marketing for Bridges2Silicon. "0-In's Check-In Program enables customers to leverage the 0-In CheckerWare libraries in their Bridges2Silicon AtSpeed HDL Verification environment."
About 0-In
About 0-In 0-In Design Automation, Inc. (pronounced "zero-in") develops and supports functional verification products that help verify multi-million gate application-specific integrated circuit (ASIC) and system-on-chip (SoC) designs. Twelve of the fifteen largest electronics companies have adopted 0-In tools and methodologies in their integrated circuit (IC) design verification flows. 0-In was founded in 1996 and is based in San Jose, Calif. For more information, see http://www.0-in.com.
0-In® and CheckerWare® are registered trademarks of 0-In Design Automation, Inc.
|
Related News
- Cadence and 0-In Collaborate to Deliver Superior Assertion-Based Verification
- 0-In Granted Key Patent in Assertion-Based Verification
- 0-In Welcomes Mentor Graphics to its Check-In Partner Program
- 0-In Demonstrates the Value of Assertion-Based Verification (ABV) throughout the Design Cycle at the Design Automation Conference
- 0-In revs assertion-based verification
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |