Imperas Provides Comprehensive ARM TrustZone Modeling Kit For OVP-Based Virtual Platforms
Kit Includes Modeling Application Note and Four Open Source, Executable Platform Examples Based Upon OVP™ ARM Cortex™ Processor Models With TrustZone Technology
OXFORD, United Kingdom, October 8th, 2013 – Imperas Software Ltd. (www.Imperas.com), a pioneer of advanced embedded software development systems using virtual platforms, today made available a System Modeling Kit designed to simplify the creation of high-performance virtual platforms that incorporate the ARM TrustZone technology.
The System Modeling Kit provides four open source virtual platform reference models, together with an application note and video, to demonstrate best modeling practices for systems based on TrustZone. The kit is designed to accelerate the learning curve for modeling TrustZone-based hardware, to provide high-performance, accurate virtual platforms that accelerate system verification, and make available immediate solutions for the execution of software stacks that incorporate security solutions based on TrustZone.
“TrustZone has become an important standard for the generation of secure embedded systems, and the Imperas OVP Fast Processor models of ARM cores that incorporate the technology are being leveraged by many of our leading customers,” noted Simon Davidmann, Founder and Chief Executive Officer of Imperas Software. “TrustZone can be complex, so we have made these reference solutions and guides public with the aim of accelerating the modeling of efficient virtual platforms that incorporate the technology.”
The ARM TrustZone technology provides a system-wide approach to security on high performance computing platforms for many applications, including secure payment, digital rights management (DRM), enterprise and web-based services. Integrated into specific ARM Cortex-A and ARM 11 processors, TrustZone extends throughout the system to secure components from software attack. Many electronic product companies are leveraging TrustZone in their development programs, proliferating this standard throughout the electronics industry.
The Open Virtual Platform (OVP) models of the ARM Cortex-A5, Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A15 and ARM 11 processors all contain the TrustZone security extensions. The processor models are implemented using Imperas’ high performance code morphing technology to allow software engineers to execute code at hundreds of millions of instructions per second. Incorporated within the model, enabled by the unique ToolMorphing™ technology, is the Imperas range of advanced development tools for efficient software analysis and debug.
The Imperas TrustZone System Modeling Kit is available now, and may be downloaded from the OVP website www.OVPworld.org/tz_download. A comprehensive application note is available from www.OVPworld.org/tz_appsnote, and a video that walks through the application note and explains the examples running is available to watch here: www.OVPworld.org/tz_video. To execute the platform examples, a license is required for either the Imperas M*DEV or M*SDK products, available from Imperas.com.
About Imperas
Imperas Software Ltd was founded in 2008 to develop and deliver embedded software development systems. The company’s comprehensive product line enables the rapid creation of high-performance virtual platforms and the efficient development of embedded software utilizing those platforms. Imperas’ technology allows for software engineering schedules to be significantly reduced while improving the quality of products relying on embedded systems. In 2008 Imperas founded the Open Virtual Platforms (OVP) consortium to improve the availability of open source model libraries and virtual platform infrastructure. Leading communications, automotive, consumer electronics and embedded processor companies rely on Imperas for the development of their electronic products. The company’s corporate headquarters is located near Oxford, UK and it maintains support and sales organizations in Silicon Valley, California and Tokyo, Japan. For more information about Imperas, please go to www.imperas.com.
|
Related News
- Fast Processor Models of Latest Arm Cores Released by Imperas and Open Virtual Platforms (OVP)
- ARM Cortex-A72 Models and Virtual Platforms Released by Imperas and Open Virtual Platforms
- UltraSoC embedded analytics and Imperas virtual platforms combine to enhance multicore development and debug
- Imperas and Andes Extend Partnership, Delivering Models and Virtual Platforms for Andes RISC-V Cores with New AndeStar V5m Extensions
- Andes and Imperas Partner to Deliver Models and Virtual Platforms for Andes RISC-V Cores
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |