Cadence Announces Availability of Interconnect Workbench for Performance Analysis and Verification of ARM-Based SoCs
SAN JOSE, CA-- October 29, 2013 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced the availability of Cadence® Interconnect Workbench. A software solution providing cycle-accurate performance analysis of interconnects throughout the system-on-chip (SoC) design process, Interconnect Workbench quickly identifies design issues under critical traffic conditions and enables users to improve device performance and reduce time to market. Interconnect Workbench works in conjunction with Cadence Interconnect Validator for a complete functional verification and performance validation solution.
By automatically generating a performance testbench that incorporates Interconnect Validator and a complete suite of AMBA Verification IP, Interconnect Workbench reduces the time and effort commonly needed to create a test environment that previously required several weeks. To boost design performance, Interconnect Workbench allows users to compare potential architectures side by side on one screen.
"Ensuring that on-chip interconnects perform optimally is a baseline requirement for today's complex SoCs, system designers need the cycle-accurate analysis that Interconnect Workbench provides to make trade-offs and enhance their designs," said Andy Nightingale, director, System IP Products, Processor Division at ARM.
"Interconnect Workbench is specifically targeted at addressing the complexity of today's SoCs," said Ziv Binyamini, corporate vice president of System and Verification Solutions, System and Verification Group at Cadence. "In addition to optimizing performance of their ARM-based mobile, consumer, networking and storage SoCs, users can also get their designs to market much faster."
For more information on the Cadence Interconnect Workbench, visit www.cadence.com/news/iwb.
Cadence and ARM will also discuss the Interconnect Workbench in a technical session titled "Measure and Optimize System Performance of a Smartphone RTL Design" at ARM TechCon on October 30, 2013. For more details on the ARM TechCon session, visit http://schedule.armtechcon.com/session-id/48.
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com/.
|
Cadence Hot IP
Related News
- Renesas Adopts Cadence Interconnect Workbench to Accelerate Performance Analysis and Verification of On-Chip Interconnect
- Cadence and Arm Deliver First SoC Verification Solution for Low-Power, High-Performance Arm-Based Servers
- proteanTecs Joins Arm Total Design, Brings Lifecycle Health and Performance Monitoring to Arm-based Custom SoCs
- Cadence Joins Arm Total Design to Accelerate Development of Arm-Based Custom SoCs
- Cadence Verification Suite Enabled on Arm-Based HPC Datacenters
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |