Synopsys Extends HAPS-70 Prototyping Family with New Solution Optimized for IP and Subsystems

HAPS Developer eXpress Solution with Pre-Integrated Hardware and Software Enables Fast Prototyping of Complex IP Systems

MOUNTAIN VIEW, Calif. -- Dec. 16, 2013 -- Synopsys, Inc., a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the availability of Synopsys' HAPS® Developer eXpress (HAPS-DX) FPGA-based prototyping system to accelerate complex IP and subsystem prototyping. The HAPS-DX system, an extension of Synopsys' HAPS FPGA-based prototyping product line, includes customized synthesis and debug software to speed prototype bring-up and streamline the transition from individual IP blocks to full system-on-chip (SoC) validation. HAPS-DX offers up to four million ASIC gates of capacity and is plug-and-play compatible with the HAPS-70 series systems enabling a seamless prototyping solution from IP to full SoC for software development, hardware/software integration and system validation.

"Xilinx Virtex-7 X690T FPGA devices support 11.3 Gb/s serdes data transfer rate, making them ideal for high-bandwidth and high-performance ASIC prototype designs," said Hanneke Krekels, director of test, measurement and emulation market segment at Xilinx. "Synopsys' HAPS-DX systems accelerate prototype bring-up via adoption of the industry standard FMC I/O technology supported by our Virtex-7 X690T FPGA, allowing designers to leverage hundreds of available FMCs, including analog-to-digital/digital-to-analog converters, video imaging and motor control."

The new, customized prototyping software included with HAPS-DX accelerates prototype availability through automated translation into a HAPS-DX specific implementation. New prototyping diagnostic and fast prototyping modes reduce the RTL review time and provide up to five times faster throughput than traditional FPGA synthesis tools. Time-consuming tasks such as ASIC clock conversion are accelerated utilizing the new HAPS clock optimization, allowing even the most complex clocking schemes to be implemented quickly in a clock-limited FPGA architecture. In addition, direct support for Synopsys Design Constraints (SDC) format and Universal Power Format (UPF) speeds the migration of the SoC's timing and power intent into the prototype.

HAPS-DX systems simplify debugging tasks by including the HAPS Deep Trace Debug hardware, in combination with Synopsys Verdi3™ debug software. HAPS Deep Trace Debug enables storage of seconds of signal trace data using included DDR3 memory. The flexible debug storage options for HAPS-DX address the need for high-speed sampling and high-capacity storage. In addition, HAPS-DX's debug software seamlessly integrates with Synopsys Verdi3 advanced debug platform to provide enhanced analysis and debug visualization.

Engineers can leverage a broad set of HAPS daughter boards through Synopsys HapsTrak® 3 connectors and standard FMCs to minimize the effort of assembling prototypes that connect to real-world interfaces. To speed system validation and software development tasks, Synopsys DesignWare® Interface IP such as PCI Express®, USB, MIPI and DDR are being pre-validated on HAPS-DX systems enabling software development earlier in the product development cycle and reducing the IP integration effort.

"As a provider of custom HapsTrak 3 daughter boards, including V-by-One and embedded DisplayPort (eDP), we are pleased by the plug-and-play feature of Synopsys' HAPS-DX systems with HAPS-70," said Takayuki Yamazaki, chief executive officer at Gigafirm Co., Ltd. "The hardware reuse capabilities built into the HAPS systems enable our mutual customers to accelerate prototype assembly and focus their efforts on valuable development tasks."

HAPS-DX's integrated UMRBus interface and optional transactors for ARM® AMBA® interconnect provide a direct connection between a HAPS-DX system and VDKs (Virtualizer Development Kits) generated using Synopsys Virtualizer™ toolset to create an integrated hybrid prototyping environment. Hybrid prototyping enables pre-RTL software development, hardware/software integration and full system validation.

"Optimized for IP and subsystem prototyping, HAPS-DX is the first solution that provides differentiated capabilities at a price point that enables mass deployment to hundreds of software engineers," said John Koeter, vice president of marketing for IP and systems at Synopsys. "With HAPS-DX, we are helping prototypers increase productivity by providing reuse of the implementation design flow, pre-validated DesignWare IP, and synthesis and debug software, which are all plug-and-play compatible with HAPS-70 systems."

Availability & Resources

The HAPS-DX FPGA-based prototyping systems are available now to early adopters.

Learn more about HAPS prototyping solutions:

HAPS-DX: http://www.synopsys.com/haps-dx
FPGA-based Prototyping Methodology Manual (free eBook download): http://www.synopsys.com/FPMM
FPGA-based Prototyping blog: http://blogs.synopsys.com/breakingthethreelaws/
HAPS Debug: http://www.synopsys.com/Systems/HAPS_DTD

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, Synopsys delivers software, IP and services to help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at http://www.synopsys.com.