myMPW+ : a complementary offer targeting ST65 nm process
Grenoble, France – January 31, 2014 -- Dolphin Integration confirms the strengthening of their partnership with STMicroelectronics and the growth of their Custom Fabless activity by going to the next step in their offering of Multi-Project Wafer: myMPW+.
myMPW+ consists in a secured Multi-Project Wafer run yearly at STMicroelectronics in 65nmLP, tailor made for sensitive applications of customers seeking confidentiality and traceability for their circuits. It allows volume variability from a few tens up to a few thousand circuits at attractive prices.
myMPW+ gives the possibility to get a metal fix on the masks for improvements after the test of the first prototypes, as well as the capability to launch low to middle volume fabrication after a first prototype acceptance, by using the same masks for deliveries spread over a couple of years, complemented with full traceability and confidentiality all along a secured production chain, including even customer return management.
Dolphin Integration will aggregate on their own mask sets the different circuits coming from various customers seeking confidentiality and traceability, which will then be launched to fabrication. The different fabrication steps are handled and controlled by Dolphin Integration acting as Prime Contractor, within the business model for ASIC services proposed through mySoC (please browse through mysoc.dolphin.fr). Once the wafers are out of foundry, special care is taken during the assembly phase, so that unused devices are stored or destroyed by Dolphin Integration. Depending on specific customer needs, the process may be stopped after receiving the prototypes, or when needing a metal fix or new engineering samples for validation purposes, or the process may be extended with a low volume fabrication, once the prototypes are validated at the system level.
For more information and details on mySoC and myMPW+ new offer, please contact soc.business@dolphin.fr.
About Dolphin Integration
Dolphin Integration contribute to "enabling mixed signal Systems-on-Chip". Their focus is to supply worldwide customers with fault-free, high-yield and reliable kits of CMOS Virtual Components of Silicon IP, based on innovative libraries of standard cells, flexible registers and low-power memories. They provide high-resolution converters for audio and measurement, regulators for efficient power supply networks, application optimized micro-controllers.
They put emphasis on resilience to noise and drastic reductions of power-consumption at system level, thanks to their own EDA solutions missing on the market for Application Hardware Modeling as well as early Power and Noise assessment. Such diverse experience in ASIC/SoC design and fabrication, plus privileged foundry portal even for small or medium volumes, makes them a genuine one-stop shop covering all customers’ needs for specific requests.
|
Dolphin Design Hot IP
Related News
- Dolphin Integration Announces a complete Panoply of Memories and Standard Cells, which uniquely offer Dual Voltage capability for the 180 nm process
- Dolphin Integration unveils a new RAM dedicated to IoT and Low Power MCU applications in 55 nm, GLOBALFOUNDRIES LPx process
- Dolphin Integration breakthrough innovation for TSMC 180 nm BCD Gen 2 process: Up to 30% savings in silicon area with the new SpRAM RHEA
- TowerJazz and Dolphin Integration to offer Chip Developers a Complete Solution addressing the Low Power Requirements of the Fast Growing IoT Market
- Availability of Dolphin Integration's TSMC-sponsored ROM at the 130 nm BCD 5 V process
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |