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ISSCC Keynote: No Silicon, Software Silos
Jessica Lipsky, EETimes
2/10/2014 07:40 PM EST
SAN FRANCISCO – Closer cooperation between chip and app developers is needed to scale the rising wall in energy efficiency that's making it hard to fulfill expectations of smaller, cheaper, faster systems, said the opening keynoter at the International Solid-State Circuits Conference (ISSCC). Stanford professor Mark Horowitz called for a combination of specialized silicon and better algorithms to combat stalled clock frequency and rising power consumption.
"In the mid 2000 decade, we really hit a power limit and were not able to scale up power because of various thermal issues," Horowitz said in the opening plenary session. "In the desktop/server community this happens around 100 watts, in laptops it's 30 watts, cell phone 1-3 watts, which means that all computing systems are power limited."
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