Mentor Graphics and First Silicon Solutions - FS2 - Announce Integrated Tools for MIPS 4KE Family Multi-Core Development
Silverback Systems Selects Mentor Graphics and FS2 Solution for Development of Network Storage Processors
PORTLAND, Ore.--(BUSINESS WIRE)--June 13, 2002-- Mentor Graphics Embedded Systems Division and First Silicon Solutions (FS2) announced today integrated tools to simplify and speed development of multi-core system-on-chip (SoC) devices based on the MIPS 4KE(TM) processor family.
The new tools have been selected by Silverback Systems, a start-up developing leading-edge silicon and software solutions for networked storage and data centers.
SoC designs have rapidly increased in complexity and number of embedded CPU cores. Synchronizing control over multiple CPUs and providing visibility into simultaneous software streams while testing and debugging present tremendous challenges to the system and software development teams. The new tools combine the Mentor Graphics® XRAY® Debugger with the FS2 System Analyzer. Using FS2 OCI® (On-Chip Instrumentation) they leverage powerful on-chip debug features jointly developed by FS2 and MIPS Technologies for the MIPS32(TM)4KE(TM) cores. For the first time ever these tools enable users of MIPS cores to synchronize control and debug tasks on any number of multiple CPUs in the design with no additional hardware logic or software requirement. They provide the user with non-intrusive, real-time trace features from a single, easy-to-use graphical program interface, which is critical for maximizing developer productivity. The new tools will result in significantly faster time to market for complex multi-core SoC designs.
Key Benefits of the new MIPS32 4KE Integrated Tools
- Synchronized, real-time starting and stopping of all cores, individual cores, or any subset of processors in the design
- Simplified control of multiple CPUs
- Single graphical interface and debug session for all user functions (other tools require multiple debug sessions and complex user configurations for multi-core support)
- Real-time trace capture of executed instruction, load/store address and data values for multiple cores
- Instruction-Set Simulation for multi-core designs for faster testing and prototyping of application software prior to the availability of target hardware
- Support for scratchpad RAM memories where minimum latency is critical
- MIPS Co-processor 2 (COP2) support
- Seamless Co-Verification Environment support for faster hardware/software development and to prevent costly silicon re-spins
- Supports GNU C/C++ compiler tools for MIPS processors
"Today's sophisticated multi-core CPU designs require debugging capabilities to analyze and view multiple CPU streams simultaneously. With this solution the sophisticated features of the latest MIPS cores can be non-intrusively accessed. User configurable real-time on-chip and off-chip trace collection options provide insight into events up to and around a trigger event, hardware or software breakpoint. Sophisticated triggering features amongst the various CPUs give the designer a new level of control and visibility, greatly speeding the debug process with these new multi-core designs," said Rick Leatherman, president of First Silicon Solutions.
"This release significantly enhances Mentor Graphics' Embedded Software Development Environment (ESDE) for MIPS32(TM) and MIPS64(TM) designs, beyond adding support for the MIPS 4KE processors," said Neil Henderson, general manager of the Embedded Systems Division of Mentor Graphics. "The XRAY Debugger has been seamlessly integrated with the FS2 System Analyzer to facilitate on-chip debug of the target system. XRAY can easily support debug of any number of MIPS cores in the customer's design, or even mixed CPU/DSP environments. Such control includes synchronous starts, stops, and breakpoints, all from one instance of the XRAY Debugger interface. No other MIPS tools on the market can match this level of functionality."
About First Silicon Solutions
First Silicon Solutions provides IP and tools for testing and debugging of SoC hardware and software. FS2 Navigator® OCI® (On-chip Instrumentation) technology helps silicon vendors and their customers develop and more effectively market their products, reducing their development cycles, and allowing them to focus on delivering all the potential of the system on silicon. For more information, call Chuck Swartley at 503/292-6730 ext. 103 or visit the web site: www.fs2.com.
About Mentor Graphics Corporation
Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $600 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 SW Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.
Mentor Graphics and XRAY are registered trademarks of Mentor Graphics Corporation. FS2, Navigator and OCI are registered trademarks of First Silicon Solutions. MIPS, MIPS32, MIPS64 and 4KE are trademarks of MIPS Technologies.
|
Related News
- Silverback Systems adopts new multi-core tools from Mentor Graphics and First Silicon solutions for iSNAP family of storage network processors
- ARM Announces New RealView Multi-Core Debugger; First Product in New ARM Family of RealView Tools
- Mentor Graphics and MIPS Technologies Unveil Complete Solution for Pre- to Post-Silicon SoC Development
- Think Silicon Announces a New Scalable Multi-Core GPU Product Suite with Extended Graphics and Video Functionality
- Mentor Graphics Launches Comprehensive Solution for Heterogeneous Multicore Embedded Software Development
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |