UFS 2.0 Will See Rapid Adoption - Fueled by Major Performance and Power Efficiency Improvements to Enable New Multimedia Applications
Industry trade group says UFS expected to be shipped in high-end mobile devices beginning late this year, becoming dominant mobile storage interface by the end of 2016
AUSTIN, Texas-- February 27, 2014 -- The Universal Flash Storage (UFS) version 2.0 standard, supported by the mobile industry and published in late 2013 by JEDEC, is projected to experience wide market adoption more quickly than previous storage offerings. UFS v2.0 bandwidth supports up to a 1.2 GB/s data transfer rate using a multi-lane approach, which is three times greater than that of the fastest flash storage chip today – eMMC 5.0.
UFS is projected to be the dominant mobile storage interface within just three years, with numerous designs expected to be in production in 2014 and 2015.
"UFS will bring substantial added performance and design flexibility to the next generation of mobile platform development, beginning in the second quarter," said UFSA (Universal Flash Storage Association) President Lisa Rhoden. "Moreover, UFS's wide-ranging set of improvements to the mobile storage space will provide a markedly improved experience for consumers," she added.
“UFS is a major step forward in storage for next generation mobile systems and is expected to proliferate rapidly to mainstream mobile applications and beyond over the next few years,” said Forward Insights President, Gregory Wong. “UFS enables designers to dramatically improve system performance thereby enhancing the user experience of mobile devices.”
UFS is a high performance, scalable storage interface designed for use in computing and mobile systems requiring low power consumption. Its high speed serial interface and optimized protocol enable significant improvements in throughput and system performance. Dramatic growth in the mobile market coupled with an increasing market focus on multimedia applications continues to drive usage and memory bandwidth requirements. The new UFS v2.0 sharply improves upon existing JEDEC Flash memory storage standards to help address this demand.
UFS provides benefits not supported by other mobile storage interfaces. Using MIPI M-PHY as the physical layer allows scalability and variability in data rate, signal count and power requirements with multiple-lane support options in a full-duplex serial implementation. Command queuing, concurrent operations, increased IOPS and reduced read/write latencies provide additional performance improvements and security features that enhance multimedia transfer in mobile devices.
The JEDEC UFS v2.0 standard utilizes MIPI M-PHY v3.0 and MIPI UniPro v1.6 specifications as its building blocks. MIPI M-PHY is a serial interface with high bandwidth capabilities, specifically developed for mobile applications to obtain a low signal count combined with excellent power efficiency. It is targeted for use with multiple protocols, including UniPro ─ a layered protocol for interconnecting devices and components within mobile device systems, and UFS as the application layer. This integration is a result of close collaboration between JEDEC and the MIPI alliance, which has brought the benefits of these specifications to the mobile storage space.
JEDEC UFS v2.0 incorporates the INCITS T10 (SCSI) command set to provide a rich, powerful and proven set of commands that improves system performance. UFS improves OS responsiveness and enables a richer user experience when storing or playing multimedia files, in addition to providing greater power efficiency. UFS also enables more secure mobile platforms, which further encourages innovation in systems and applications.
About UFSA
The Universal Flash Storage Association (UFSA) was founded in 2010 as an open trade association to promote widespread adoption and acceptance of the UFS standard. Board of Director members include Agilent Technologies, Micron Technology, Phison Electronics, Samsung Electronics, Silicon Motion Technology and SK Hynix. For more information about UFSA: http://www.universalflash.org/
Sample support quotes from member companies
“We’ve seen an exponential growth of interest and an increase in the number of licensees of our UFS IP product portfolio during the latter half of 2013. UFS 2.0 with MPHY at Gear 3 speeds have given UFS a huge advantage in speed and power over competing standards. We expect this demand to accelerate during this year as UFS gains broader market acceptance beyond mobile. Arasan is geared to meet this increased demand,” said Zachi Friedman, Director of Marketing, Arasan Chip Systems, Inc.
“With more functionality being incorporated into mobile SoC designs, Synopsys is seeing significant demand for IP interfaces such as JEDEC UFS,” said John Koeter, vice president of marketing for IP and systems at Synopsys. “As the JEDEC UFS 2.0 standard gains widespread adoption in low-power mobile applications, SoC designers can continue to rely on Synopsys to provide silicon-proven mobile storage UFS and MIPI IP solutions that meet their low power, low latency, and compact footprint requirements.”
Related News
- Hybrid Memory Cube Consortium Advances Hybrid Memory Cube Performance and Industry Adoption With Release of New Specification
- Truechip announces first customer shipment of USB 3.1 and UFS 2.0 VIP to early adoption partners
- CEVA's New 1 GHz Programmable DSP Core Offers Exceptional Performance and Power Efficiency for Next Generation Communications and Multimedia SoCs
- Dolphin Integration announces the availability of the major release of Power Consumption Analyzer SCROOGE 2.0.
- Achronix and BigCat Wireless Collaborate to Deliver Unprecedented Power Efficiency and Performance for 5G/6G Wireless Applications
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |