Cadence Incisive Specman Elite Testbench Reduces Verification Time for Sharp by 50 Percent
SAN JOSE, Calif., 17 Mar 2014 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Sharp deployed Cadence® Incisive® Specman® Elite Testbench to develop a combined proximity and ambient light sensor for smartphones, tablets and digital single-lens reflex cameras. By utilizing Incisive Specman Elite Testbench, Sharp reduced its hardware verification time by 50 percent, which enabled the company to meet its product target dates with higher quality.
Sharp utilized the metric-driven verification (MDV) methodology with Incisive Specman Elite Testbench for automatic job management and result analysis, which helped reduce human errors and man-hours of the verification management tasks. The constrained random capability of the Incisive Specman Elite Testbench enabled Sharp to find difficult corner-case bugs easily in their register-transfer level (RTL) in one day, which would have taken 10 days under prior methods of directed tests. In addition, Sharp improved the overall productivity of its verification team by building a Universal Verification Methodology for Specman e (UVM-e) environment for reusability, which reduced the time for testbench creation by 70 percent and saved a month of engineering time.
"We were able to hit our release date and deliver our product on time, with confidence that the design would result in working silicon by weeding out difficult bugs in a minimal amount of time," said Toshiyuki Ichinose, department general manager of Electronic Components and Devices Division at Sharp Corporation. "In the development of new models, the reusability of the Incisive Specman Elite environment allowed a reduction of design time."
For more information on Incisive Specman Elite, visit www.cadence.com/sites/specman.
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available here.
|
Cadence Hot IP
Related News
- OKI Network LSI Reduces Test Time 90% by Combining the Open Verification Methodology (OVM) and Cadence Incisive Technologies
- New Cadence Incisive Verification Platform Compresses Overall Verification of Nanometer-scale Designs by Up to 50 Percent
- Faraday Reduces Packaging Design Time by 60 Percent Using Cadence OrbitIO Interconnect Designer and SiP Layout
- Hitachi Reduces Verification Turnaround Time for Mixed-Signal Chip with Cadence Virtuoso AMS Designer
- Cadence Introduces Automotive Functional Safety Verification Solution, Reducing ISO 26262 Compliance Preparation Effort by up to 50 Percent
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |