SpaceStudio Hardware Software Codesign Tool Expands Offering to New SoC Design Markets
Montreal (QC) -- March 31, 2014 -- Space Codesign Systems, a leading provider of hardware software codesign and ESL SoC design technology, today announces the release of SpaceStudio 2.6.0. The latest version of Space Codesign’s embedded systems design tool will enable a larger community of engineers to accelerate their development design cycle time, improve embedded systems code quality and lower SoC design costs.
The pursuit of developing a competitive product with the right features, at the right time and cost, results in multimillion-gate designs. Due to increased chip complexity, SoC design is facing bottlenecks in the embedded systems design process, especially in terms of validation. “The traditional design environment is no longer sufficient for engineers as they must rapidly evaluate multiple embedded systems design constraints while simultaneously generating virtual prototypes for their new architecture,” says Dr. Guy Bois, founder and president of Space Codesign Systems. “In order to obtain more advanced architecture modeling capabilities, faster simulation speed and expanded validation support while resolving integration and synthesis issues, engineers need to raise the level of abstraction using hardware software codesign to save weeks of development time.”
The SpaceStudio ESL SoC design tool enables system architects to automatically raise the level of abstraction, taking end-to-end hardware software codesign from high level functional specification to the architectural phase. This new release offers engineers a variety of new capabilities to better model the hardware environment. Release 2.6.0 offers support for the leading processor models using the QEMU processor emulator which can be configured into many different leading CPU architectures including Intel, PowerPC and ARM. SpaceStudio 2.6.0 also introduces support for Embedded Linux OS, enabling engineers in the multimedia, IoT, and mobile (smartphone, tablet) industries to benefit from an accelerated design process. Traditional support for other areas like aerospace and avionics continues to evolve. Space Codesign’s new release also incorporates enhanced L1 and L2 cache modeling support, adding realistic architectural detail in single and multicore designs. A PCI-Express interconnect model has been added to SpaceStudio’s SpaceLib library, which already includes AMBA (AXI, AHB, APB) interconnect models, to enable System-On-Board and SoC modeling.
For further information about Virtual Platform and achieving higher level of abstraction in SoC design, check out the SpaceStudio web page. Find out how ESL tools featuring hardware software codesign can improve embedded systems design creation, speed up the design development cycle and lower SoC design costs.
About Space Codesign Systems
Space Codesign® Systems, Inc. is the developer of SpaceStudio™, the only ESL (Electronic System Level) design technology that enables end-to-end automated hardware/software codesign - from high-level functional specification to the architectural and RTL (Registered Transfer Level) coding phase. This automation enables electronics engineers to enjoy a higher level of abstraction and executable representation for embedded systems design in industries such as aerospace and commercial multimedia applications. SpaceStudio is distributed worldwide. EDATechForce and Avant Technology are Space Codesign’s sales partners on the US west coast and in East Asia, respectively.
|
Related News
- New Integration Between SpaceStudio Hardware Software Co-design and European Space Agency’s TASTE Tool Set
- Space Codesign Systems to Release Version 2.4
- Space Codesign Introduces the First Virtual Platform Technology Supporting Hardware/Software Codesign for FPGA Based on ARM Cortex-A9
- Actel Expands MIL-STD-1553 Offering With New IP Core for Military, Space and Industrial Markets
- Space Codesign Systems joins Siemens Digital Industries Software Solution Partner Program as a Software and Technology Partner
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |