VeriSilicon Expands Its Hantro Video IP Portfolio With HEVC Main 10 Profile and AVS+ Decoder Capabilities
Enables Digital TV, Set-Top Box and Home Gateway Chipsets for Ultra HD/4K
LAS VEGAS-- April 8, 2014 --VeriSilicon Holdings Co., Ltd. (VeriSilicon), a leading custom silicon solution and semiconductor IP provider, today announced the availability of High Efficiency Video Coding (HEVC) Main 10 Profile decoder in Hantro Video IP as well as the availability of AVS+ decoder IP to support HDTV and 3D TV services in China.
HEVC Main 10 Profile is supported in Hantro G2 Multi-format Decoder IP. Hantro G2, which is the industry’s first IP to achieve 4K@60 fps with a single-core architecture, supporting both HEVC and VP9 video formats. Hantro G2 represents the 13th generation of Hantro Video IP, the market leading video semiconductor IP deployed in billions of chips and used by more than 90 semiconductor companies worldwide.
“Consumer trends are transitioning rapidly toward ultra high definition capabilities on both large screens such as TVs and smaller screens such as media tablets and smartphones. Broadcasters worldwide have announced plans for 4K roll-out based on the HEVC Main 10 Profile, and Internet video services such as YouTube and Netflix are also rapidly migrating to 4K,“ said Dr. Wayne Dai, Founder, President and CEO of VeriSilicon. “ Hantro G2 Multi-format Decoder IP provides a unique universal solution that can support diverse needs such as HEVC Main 10 for broadcasting, HEVC Main for Netflix and VP9 for YouTube for our application processor and DTV/STV SoC customers.“
VeriSilicon also announced integrated support for AVS+, a second-generation video standard for HDTV and 3DTV broadcasting services approved as a Chinese national standard in July 2012. AVS+ has been added to the Hantro G1 Multi-format decoder, providing support for all legacy video formats.
About VeriSilicon
VeriSilicon Holdings Co., Ltd. is an integrated circuit (IC) design foundry that provides custom silicon solutions and system-on-chip (SoC) turnkey services for a wide range of electronics devices and systems, including smart phones, media tablets, HDTVs, set-top boxes, home gateways, networking, and data centers. VeriSilicon’s technology solutions include licensable ZSP® (digital signal processor) based HD audio, multi-band and multi-mode wireless, and HD voice platforms; Hantro HD video platform; mixed signal NUI (natural user interface) platforms for voice, motion and touch interface; and “internet of everything” platforms for wearables, smart cards and smart energy. VeriSilicon’s custom silicon turnkey service encompasses design service that combines its technology solutions and value-added mixed signal IP portfolio targeted for a wide range of process technology nodes, including advanced nodes such as 28nm and FD-SOI, and provide product engineering service for SoC as well as System in a Package (SiP). VeriSilicon’s platform-based SoC design solutions shorten the design cycle, enhance quality, and reduce risk.
Founded in 2002 and dual head-quartered in Shanghai, China and Santa Clara, California, VeriSilicon has over 450 employees with six R&D centers (China, US and Finland) and nine sales offices worldwide.
For more information, please visit www.verisilicon.com.
For more information on Hantro G2 Multi-format Decoder and Hantro G1 Multi-format Decoder products, please visit http://www.verisilicon.com/IPPortfolio_2_14_1_HantroVideoIP.html.
|
Search Silicon IP
Verisilicon, Inc. Hot IP
Related News
- VeriSilicon Introduces Hantro G2 Video Decoder IP with HEVC and VP9 Support
- VeriSilicon Introduces Hantro G2 Video Decoder IP with HEVC and VP9 Support
- VeriSilicon delivered multi-format hardware video decoder Hantro VC9000D supporting 8K@120FPS VVC/H.266 to customers
- VeriSilicon Introduces Hantro G2v2 Multi-format Decoder IP with VP9 Profile 2 to Support 10-bit Premium Internet Content
- Xilinx Expands into New Applications with Cost-Optimized UltraScale+ Portfolio for Ultra-Compact, High-Performance Edge Compute
Breaking News
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
- CAST Adds New SafeSPI Controller to its Functional Safety IP Core Product Line
Most Popular
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- MIPS Releases P8700, Industry's First High-Performance AI-Enabled RISC-V Automotive CPU for ADAS and Autonomous Vehicles
- SLS Launches Industry-First USB 20Gbps Device IP Core
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
- Alphawave Semi Partners with PCISig, CXL Consortium, UCIe Consortium, Samtec and Lessengers to Showcase Advances in AI Connectivity at Supercomputing 2024
E-mail This Article | Printer-Friendly Page |