7 µW always on Audio feature extraction with filter banks on TSMC 22nm uLL
Sonics Extends Flagship On-Chip Network Product, Addresses Low Latency SoC Designs for the Wearable Market
SonicsGN Scales Performance to Support Unified SoC Design Platforms Based on a Single NoC
Milpitas, Calif. – April 29, 2014 – Sonics, Inc., the world’s foremost supplier of on-chip network (NoC) technologies and services, today introduced the latest version of SonicsGN™, which provides greater configurability to meet the performance requirements of systems-on-chip (SoC) being designed for wearable devices as well as wireless handheld, wired consumer, and communications infrastructure devices. Sonics extended SonicsGN’s low-frequency performance to reduce latency by 40 percent over the previous version and enable optimized support for a broader range of performance requirements from 100MHz up to 2GHz clock frequencies. SoC designers can now standardize on a single NoC, which allows their platforms to scale from high-end communications applications to emerging power and time-to-market sensitive wearable applications.
“Our customers are unifying approaches to platform-based SoC design using a single NoC that allows them to interconnect heterogeneous IP cores for multiple applications,” said Drew Wingard, CTO of Sonics. “The explosive growth expected in wearable devices challenges OEMs and semiconductor suppliers to apply their domain knowledge and IP in new and unpredictable ways. Because this market is so dynamic and fast-paced, wearable SoCs require very rapid design cycles leveraging accelerated core integration processes. We’ve significantly reduced the latency and optimized the performance and power characteristics of SonicsGN for the low-end of the SoC performance range where most wearable devices will reside – without compromising its throughput at the higher end. This will help deliver feature and power levels that enable long battery life and tiny form factors.”
SoC design requirements for wearable devices are typically lower in complexity, power dissipation, and frequency than the SoCs found in smartphones. To extend SonicsGN for these designs, Sonics added configurability to eliminate pipeline stages inside the network fabric. By lowering the latency of the on-chip network, these optimizations result in measurable reductions in buffering area and power consumption for the overall SoC design. SonicsGN continues to provide advanced security features, for example, to protect user data in wearable healthcare applications. Security combined with industry-leading scalability make SonicsGN the most attractive NoC solution for companies implementing unified SoC design platform strategies.
Availability
SonicsGN has passed Sonics’ rigorous IP verification and quality assurance program and is available immediately. For pricing and more information, contact your Sonics sales representative.
About Sonics, Inc.
Sonics, Inc. (Milpitas, Calif.) is the global leader in trusted on-chip network (NoC) technologies used by the industry’s top semiconductor and electronics product companies. Sonics was the first company to develop and commercialize NoCs, accelerating volume production of complex systems-on-chip (SoC) that contain multiple processors and intellectual property (IP) cores. Our comprehensive NoC portfolio delivers the communication performance required by today’s most advanced consumer digital, communications and information technology devices. Sonics’ NoCs are integral to the success of SoC design platforms that innovators such as Broadcom®, Intel®, Marvell®, MediaTek, and Microchip® rely on to meet their most demanding SoC integration and time-to-market requirements. Sonics’ holds more than 138 patent properties supporting products created by a global customer list that have shipped more than two billion SoCs. For more information, visit sonicsinc.com
|
Related News
- Artosyn Licenses SonicsGN On-Chip Network to Integrate Drone SoC
- eSilicon Uses Sonics' Flagship On-chip Network in Complex SoC Design
- Sonics Upgrades Flagship On-Chip Network to Improve Memory Subsystem Support and Quality of Service
- ICE-P3 EPU Upgrade Simplifies Control Of On-Chip And External Resources To Save More Power In SoC And MCU Designs
- Sonics Improves NoC Concurrency Management for SoC Designs with Multi-Channel Memory Sub-systems, Addresses Place & Route Tool Restrictions
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |