Synopsys Introduces Optimized DTS-HD Decoder for DesignWare ARC Audio Processors

Certified Decoder Supports Multiple DTS Audio Formats with High-Quality Audio Streaming for Internet-Connected Products

MOUNTAIN VIEW, Calif., May 8, 2014 -- Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the immediate availability of the DTS-HD® audio decoder optimized for its DesignWare® ARC® AS211SFX and AS221BD Audio Processors. The DTS-HD audio decoder provides manufacturers of internet-connected devices with a single technology solution for decoding all DTS 5.1 channel audio formats. The DTS-HD decoder, certified by DTS for the ARC AS2xx family of single- and dual-core audio processors, is optimized to minimize memory and bandwidth requirements on ARC audio processors and supports the DesignWare SoundWave Audio Subsystem. It enables system-on-chip (SoC) designers to more efficiently implement high-quality audio playback in a wide variety of consumer electronics including digital TVs, set-top boxes and personal media players.

"ARC audio processors deliver high-quality sound with minimal power consumption, making them ideally suited to showcase the DTS-HD technology," said Joanna Skrdlant, vice president, solutions licensing at DTS. "With the DTS-HD decoder optimized and certified for ARC audio processors, our partners can integrate enhanced audio performance into their products with less development and certification effort, accelerating their time-to-market. We look forward to continuing our collaboration with Synopsys for the benefit of our mutual licensees."

The ARC AS211SFX and AS221BD audio processors are key components of Synopsys' DesignWare ARC audio solution. This powerful combination of scalable hardware and software IP includes codecs, audio processors, media streaming frameworks and post-processing software. The ARC-optimized DTS-HD decoder can be used on either the single-core AS211SFX or dual-core AS221BD Audio Processor, giving designers the flexibility to configure designs for specific applications and performance requirements. ARC audio processors incorporate dual MAC (Multiply-Accumulate) execution units for efficient audio processing. The DTS-HD decoder for ARC processors can process all discrete 5.1 channel DTS audio formats including DTS Digital Surround™, DTS Express™, DTS-HD and DTS-HD Master Audio™.

With sampling frequencies of 44.1 kHz, 48 kHz and 96 kHz and the ability to decode multiple audio streams, the new decoder is optimized to minimize bandwidth requirements of ARC audio processors, enabling the processor to perform more functions at the same frequency, or run at a lower frequency to reduce power. The DTS-HD decoder is tolerant of high memory latency, with a processor load of only 52 MHz with 100 cycles latency. This allows easier system configuration for multimedia applications and enables designers to implement their system with slower, lower-cost memory.

"Synopsys is strengthening its support of the latest audio technologies with its licensing of the industry's most popular audio codecs into the ARC audio IP portfolio," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "Designed to process high-quality audio streams and deliver superior HD sound, the ARC-optimized DTS-HD decoder provides designers of consumer entertainment products a pre-certified codec that can reduce the integration time and testing required to deliver high-fidelity audio."

Availability and Resources

The DTS-HD decoder, optimized for the ARC AS211SFX and AS221BD Audio Processors, is available now.

Learn more about the DTS-HD decoder for ARC audio processors: http://www.synopsys.com/dw/ipdir.php?ds=arc_audio_dts_m6
Learn more about the DesignWare ARC audio solution: http://www.synopsys.com/IP/ProcessorIP/ARCAudio/Pages/default.aspx

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP, embedded memories, logic libraries, processor solutions and subsystems. To support software development and hardware/software integration of the IP, Synopsys offers drivers, transaction-level models, and prototypes for many of its IP products. Synopsys' HAPS® FPGA-Based Prototyping Solution enables validation of the IP and the SoC in the system context. Synopsys' Virtualizer™ virtual prototyping tool set allows developers to start the development of software for the IP or the entire SoC significantly earlier compared to traditional methods. With a robust IP development methodology, extensive investment in quality, IP prototyping, software development and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, its software, IP and services help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at http://www.synopsys.com.