Arasan Chip Systems Announces the Industry's First SD 4.1 and eMMC 5.0 Combined Host Controller
Arasan combines the latest SD Association (SDA) SD 4.1/SDIO 4.1 Host Controller with the latest JEDEC eMMC 5.0 Host Controller.
San Jose, CA -- May 13, 2014 -- Arasan Chip Systems, Inc. (“Arasan”), a leading provider of Total IP Solutions for mobile applications, announced today the availability of the industry’s first combined SD 4.1, SDIO 4.1, eMMC 5.0 Host Controller. Arasan’s long-standing active contributor status to both SDA and JEDEC allows a first to market advantage with both storage card and embedded Flash memory controllers for mobile applications.
Arasan will host a live webinar on SD 4.1 at 6:00 PM PDT, May 13, 2014. Visit Arasan.com/Webinars to register.
To meet the ever increasing data transfer rate in high end applications, such as professional broadcasting transmission or advanced high resolution display, the SD 4.1 specification calls out the maximum performance of 1.56 Gbps at UHS-II full duplex mode or half duplex UHS-II at 3.16 Gbps. With the newly introduced ADMA 3, the OS driver is now able to issue multiple read or multiple write commands at once, without having to wait for the SD controller to complete one command at a time. Once the SD host controller has collected multiple commands, it will then manage and complete them without intervention from the host. This feature can be very useful when running multithreaded applications where multiple applications are constantly updating their status or swapping their contents by writing or reading small chunk of data to or from the memory card.
eMMC, offered in small BGA packages and featuring low power consumption, is the dominant, low-cost memory solution for mobile and other space-constrained products. eMMC is an embedded non-volatile memory system, consisting of both flash memory and a flash memory controller that simplifies the application interface design and frees the host processor from low-level flash memory management. This benefits product developers by reducing time-to-market as well as facilitating support for future flash device offerings. eMMC v5.0 provides bandwidth up to 400MB/s.
Helping engineers to accelerate time to market, Arasan provides a complete suite of tools for IP integration including SD 4.1 link layer controller IP, UHS-II PHY in advanced process technologies, verification IP with robust test suite, FGPA validation and development platform, and software stack in source code. The link layer controller IP is designed with the most interoperability in place, based on Arasan’s extensive experience in working with many SD host and SD device companies. Arasan has conducted several interoperability tests to ensure wide range of compatibility with different products in the market. Developed in advanced, 40nm and below process nodes, the UHS-II PHY is designed for higher signal integrity and lower power consumption compared to competition. Arasan has optimized its Linux -based SD software driver and tested its performance by running the Linux storage device benchmark; the benchmark results demonstrated the software driver achieving more than 90% bandwidth efficiency to squeeze out every bit of performance improvement.
Availability
Arasan SD 4.1 / SDIO 4.1 / eMMC 5.0 Host Controller is available now, including digital (RTL) IP, UHS-II PHY (SD 4.0), HS400 PHY (eMMC 5.0), Verification IP (VIP), Linux Software Stack in source code, and Hardware Validation Platforms (HVP), with all supporting documents.
About Arasan
Arasan Chip Systems is a leading provider of Total IP Solutions for mobile storage and connectivity applications. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP cores, analog PHY interfaces, verification IP, hardware verification kits, protocol analyzers, software stacks and drivers, and optional customization services for MIPI, USB, UFS, SD, SDIO, MMC/eMMC, UFS, and many other popular standards. Arasan’s Total IP products serve system architects and chip design teams in mobile, gaming and desktop computing systems that require silicon-proven, validated IP, delivered with the ability to integrate and verify both digital, analog and software components in the shortest possible time with the lowest risk.
Unlike many other IP providers, Arasan’s Total IP Solution encompasses all aspects of IP development and integration, including analog and digital cores, hardware development kits, protocol analyzers, validation IP and software stacks and drivers and optional architecture consulting and customization services. Based in San Jose, CA, USA, Arasan Chip Systems has a 17 year track record of IP and IP standards development leadership.
|
Arasan Chip Systems Hot IP
Related News
- Arasan Chip Systems Announces the Industry's First SD 4.1 Total IP Solution
- Arasan Chip Systems Announces support of new JEDEC standard; eMMC 4.51
- Ambarella licenses the World's First Standard SD MMC 4.0 Host Controller IP core from Arasan Chip Systems
- SD/eMMC Host and Device Controller IP Cores including matching PHYs with high performance, and high storage capacity available for license to secure your removable and embedded storage
- Mobiveil's 25xN RapidIO 4.1 compliant controller IP achives production status
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |