QuickLogic QuickMIPS ESP Is Industry's First -- Combines a High-speed Processor With Hardwired Functions and Field Programmability
QuickLogic QuickMIPS ESP Is Industry's First -- Combines a High-speed Processor With Hardwired Functions and Field Programmability
- Delivers Fast and Efficient System Solution Using Application Specific Functions With Programmable Logic
- Development Environment Enables Software/Hardware Co-development
The first QuickMIPS device, the QL901M, is based on MIPS Technologies' MIPS32(TM) 4Kc(TM) microprocessor core running at 133 MHz to 175MHz, when built on 0.25-micron and 0.15-micron processes respectively. This new ESP family delivers the unique combination of guaranteed ASSP performance, an ASIC design flow and FPGA flexibility in a single system. We expect this platform to reduce full system design times in such advanced applications as Internet routers, Voice Over Internet Protocol (VOIP), access platform for wired and wireless communications systems, telecommunications switches and industrial control applications.
"By delivering a single chip that combines the guaranteed performance of an embedded processor system, the flexibility of our high-performance programmable logic and a complete design-support package, we believe it will give our customers a significant time-to-market advantage in an increasingly competitive marketplace," said Peter Feist, QuickLogic's vice president of worldwide marketing. "We intend to deliver higher performance and advanced design products as we move from a 0.25-micron process on to 0.15-micron."
New Features and Performance Draw Interest
"We decided to evaluate the QuickMIPS QL901 because it offers all the features necessary for our VOIP gateway, as well as the flexibility we need to add our expertise and technical value," said Patrick Christian, senior vice president and CTO of Vegastream.
Completely verified and characterized functionality is key to QuickMIPS system performance. At the heart of the embedded processor system is an optimized MIPS32 4Kc hard core with 16K bytes of data and 16K bytes of instruction cache. The 32-bit Advanced High Performance Bus (AHB) with 16Kbits of SRAM allows access to and from both the processor and programmable logic to high performance functions: Two 10/100 Ethernet MACs, a 32-bit 66/33 MHz PCI, MMC (multifunction memory controller) and an interrupt controller. A 32-bit Advanced Peripheral Bus (APB) gives access to four 32-bit timers and two UARTs.
The high-performance programmable fabric totals 457,000 system gates, which includes 2,000 logic cells, 83K bits of dual-port SRAM and 18 Embedded Computational Units (ECUs). An extension of the APB and AHB on the programmable fabric gives users the freedom to customize their products, including the creation of math-intensive functions. This allows easy instantiation of AMBA Bus compliant soft Intellectual Property (IP), which saves designers time and enables them to focus on adding value.
Complete Design Environment
The QuickMIPS design environment includes a reference design kit with drivers as well as the VxWorks(R) and BlueCat Linux(R) real time operating systems and a QuickMIPS system model. It also offers the first On-Chip Instrumentation (OCI(TM)) solution that makes possible integrated debug of the programmable logic fabric and the CPU. In addition to the run control and debugging features accessible through the MIPS EJAG port, the device features a Configurable Logic Analysis Module (CLAM(TM)), which allows the user to trace and trigger on up to 128 specified internal nodes (32 at a time) within the programmable logic fabric. Cross triggering between CLAM and MIPS CPUs enables instructions to be stopped and traced back to the fabric, thereby speeding software-hardware codesign and co-verification.
"Deciding whether to use a traditional programmable logic approach versus QuickMIPS is similar to choosing between soft IP and the pre-verified functionality of hard IP," said Lit Lam, senior director of marketing. "In essence the soft IP can be compared to a `some assembly required' tool that can take you days to finish. Our product is delivered virtually complete so it is truly an `out-of-the-box' solution that requires minimal design by the user."
QuickMIPS Availability
The QL901M is available now at $65 in quantities of 10,000. The system design package also is available for $2,500. See the QuickLogic website for additional information on QuickMIPS: www.quicklogic.com
QuickLogic ESP Advantages
QuickLogic ESP families represent a system-level IC approach based on optimized, pre-characterized embedded functionality surrounded by user-configurable logic. The performance and size advantages provided by these embedded functions and QuickLogic's ViaLink logic architecture make these families ideal for high-speed, low-power applications such as tele- and data-communications, data storage and imaging. QuickLogic ESP families include QuickPCI(TM), QuickDSP(TM), QuickRAM(TM), QuickSD(TM) QuickFC(TM) and QuickMIPS(TM).
About QuickLogic
QuickLogic Corporation (Nasdaq:QUIK) introduced the Embedded Standard Product (ESP) architecture in 1998, creating a new class of semiconductor devices that combines the guaranteed performance and lower cost of standard products with the flexibility and time-to-market benefits of programmable logic. Since then, QuickLogic has developed more than 100 ESP solutions for OEMs in such markets as telecommunications and data communications; video/audio, graphics and imaging; instrumentation and test; high-performance computing; and military systems. For more information on the company and its products, please go to www.quicklogic.com.
Safe Harbor Statement Under The Private Securities Litigation Reform Act of 1995
This news release contains forward-looking statements based on current expectations that involve risks and uncertainties including statements regarding pricing and availability of QuickMIPS devices. QuickLogic's actual results may differ from the results described in the forward-looking statements. Factors that could cause actual results to differ include, but are not limited to, general conditions in the semiconductor industry, development risks associated with the usage of QuickMIPs products, market acceptance of QuickMIPs and the impact of competitive products. These and other risk factors are detailed in QuickLogic's periodic reports and registration statements filed with the Securities and Exchange Commission. Note to Editors: QuickLogic, the QuickLogic logo and ViaLink are registered trademarks and QuickFC, QuickPCI, QuickDSP, QuickRAM and QuickSD are trademarks of QuickLogic Corporation. All other brands or trademarks are the property of their respective holders and should be treated as such.
CONTACT:
- QuickLogic Corporation
Jan Houts, 408/990-4256
houts@quicklogic.com
or
Bucy Communications
Bill Bucy, 650/289-0635
bbucy@pacbell.net
Related News
- ARC International's Soft IP Core Combines with SMSC's USB 2.0 PHY to Achive High-Speed USB Certification
- NetLogic Microsystems Enables Significantly Richer LTE and IPTV Network Services with the World's First Knowledge-based Processor with High-Speed Serial Interface
- Samsung, Intrinsity Partner to Provide New Generation High-Speed, Low Power Processor Cores
- EVE's ZeBu Proven High-Speed Verification Solution for IBM PowerPC 405, 440 SoC Designs
- NXP Semiconductors unveils industry's first ARM7 microcontrollers with dual high-speed buses
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |