English
IP And FinFETs At Advanced Nodes
Ed Sperling, Semiconductor Engineering
July 10th, 2014
Semiconductor Engineering sat down to discuss IP and finFETs at advanced nodes with Bernard Murphy, CTO of Atrenta; Warren Savage, president and CEO of IPextreme; Aveek Sarkar, vice president of engineering and product support at Ansys-Apache; Randy Smith, vice president of marketing at Sonics. What follows are excerpts of that conversation.
Related News
- IP And FinFETs At Advanced Nodes - Part 2
- eMemory Won TSMC OIP Partner of the Year Award for the Outstanding Development of its NVM IP on Advanced Nodes
- Faraday Adds Video Interface IP to Support All Advanced Planar Nodes on UMC Platform
- Alphawave Semi Expands Partnership with Samsung Foundry to Further Drive Innovation at Advanced Semiconductor Nodes
- Arm and Synopsys Strengthen Partnership to Accelerate Custom Silicon on Advanced Nodes
Breaking News
- Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
- Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
- VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
- ARM boost in $100bn Stargate data centre project
- MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
|
E-mail This Article | 
|
|
Printer-Friendly Page |