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Faraday Introduces USB2.0 Physical Layer IP
Faraday's USB2.0 Physical Layer IP Has Been Certified by USB-IF
HSINCHU, TAIWAN -- July 4, 2002 - Faraday Technology Corporation (Taiwan OTC: 5404), announced that its USB2.0 physical layer IP test chip, together with the end-application devel-oped by its customer Prolific, had received the official certification of the USB Implementers Forum (USB-IF).
Faraday's USB2.0 Physical Layer IP adopts UMC 0.25-micron 1P4M2G 2.5v/3.3v logic process, features low power consumption and is easy to integrate with other logic circuits based on standard cell libraries. This cer-tified USB2.0 Physical Layer IP conforms to Intel's USB2.0 Transceiver Macro-cell Interface (UTMI) and supports 16-bit 30MHz interfaces. It has been proven to be easily integrable with any USB2.0 device controller circuit conforming to the UTMI standard.
Having completed more than 70 successful design service projects re-lated to USB1.1, Faraday is the most experienced ASIC design service company providing USB related ASIC and IP services. Based on current market needs, most USB1.1 applications will be upgraded to adopt USB2.0 soon. Currently Faraday has won several ASIC projects embedding this USB2.0 Physical Layer IP, and some of these projects will be taped out and go into mass-production stage in the third quarter this year.
Faraday's latest test chip for its USB2.0 Physical Layer IP is now available.
About Faraday
Faraday Technology Corporation has been providing remarkable ASIC design services and valuable IPs (Intellectual Properties) for customers ranging from small start-ups to large multinational IC de-sign houses and system houses. With more than 380 em-ployees and annual revenue of 2.4 billion NT Dollars in 2001, Faraday is the largest organization of its type in the Asia-Pacific area. Headquartered in Hsinchu, Taiwan, Faraday has branch offices around the world, including the U.S.A., Japan and Europe. More information on Fara-day is available at: www.faraday.com.tw
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