7 µW always on Audio feature extraction with filter banks on TSMC 22nm uLL
IP Reaches Back To Established Nodes
As SoC developers shift backward to established nodes, steps can be taken to improve the IPs functionality.
Ann Steffora Mutschler, Semiconductor Engineering
August 7th, 2014
Driven by the IoT and wearable market opportunity, SoC developers are shifting backward to established nodes, and what is learned at the leading-edge nodes is being leveraged in reverse as IP is ported backward to improve functionality.
IP certainly can be improved to work faster at older geometries, stressed Krishna Balachandran, product marketing director for low power at Cadence. “Threshold voltage manipulation like forward biasing has been selectively used to speed up critical portions of the IP at the expense of increased leakage that is restricted to those sections of the IP without significant overall impact. IP area also can be traded off for performance. Techniques range from layout design optimizations, like using larger channel transistors, to architectural duplication of functional units.”
Related News
- Comprehensive ADC/DAC and AFE IP Solutions: Enabling Next-Generation Applications Across Varying Technology Nodes
- Comprehensive ADC/DAC and AFE IP Solutions: Empowering Next-Gen Applications Across Diverse Technology Nodes
- DisplayPort Rx PHY and Controller IP Cores in multiple Leading Technology Nodes for Next-Generation Video SoCs
- eMemory Won TSMC OIP Partner of the Year Award for the Outstanding Development of its NVM IP on Advanced Nodes
- Faraday Adds Video Interface IP to Support All Advanced Planar Nodes on UMC Platform
Breaking News
- Cortus MINERVA Out-of-Order 4GHz 64-bit RISC-V Processor Platform targets automotive applications
- Quadric Announces Lee Vick is New VP Worldwide Sales
- Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |