SandCraft Delivers World's Highest Performance MIPS Processor

New SR71000 Sampling With 600MHz and 500MHz Speed Grades; 800MHz Speed Grade Imminent

SAN JOSE, Calif.--Oct. 15, 2001--SandCraft Inc., a leader in the design of high-performance MIPS(R) processors, today announced its first product, a MIPS processor with speed grades up to 800MHz. The SR71000 is sampling now to qualified customers in 600MHz and 500MHz speed grades, and samples of the 800MHz speed grade will be available in Q1 2002. With its high frequency capability, large caches and advanced pipeline architecture, the SR71000 provides the highest performance of any embedded MIPS processor on the market today. This scalable architecture will migrate to GHz rates and beyond.

"This is a major milestone in our company's history," said Paul Vroomen, president and CEO of SandCraft. "This accomplishment validates our technology and vision, and establishes SandCraft as a serious and viable vendor of high performance embedded devices for communications networking and imaging markets."

The SR71000 is SandCraft's own implementation of the MIPS64 Instruction Set Architecture and incorporates a deeply staged multi-pipelined design with dynamic branch prediction and low power consumption. At the heart of the processor is a single MIPS64 CPU core.

"The performance of high-end embedded applications, such as control plane management of routers and switches or control of sophisticated imaging processes, are often constrained by the performance of the CPU that manages the system," said Max Baron, editor-in-chief, MicroProcessor Report. "A high-performance, general-purpose microprocessor such as SandCraft's SR71000 is ideal for handling complex real-time operating systems in non-deterministic, highly interrupt-driven environments and consequently can materially increase the performance of such systems."

The SR71000 is pin-compatible with current MIPS microprocessors of lesser performance, which permits easy adoption. By relying on a verified, stable, proven architecture, SandCraft reduces the risk of development for its customers and lets them rapidly offer new product enhancements, and improve system performance, while preserving their current hardware and software platforms.

"We applaud SandCraft's innovative approach to MIPS-based SoC design, which has resulted in this exciting new high-speed processor," said John Bourgoin, chairman and CEO of MIPS Technologies. "MIPS enjoys broad adoption and recognition as an 'industry standard' architecture, especially within the networking segment of the embedded electronics industry. By offering the only openly licensable high-performance embedded architecture, MIPS Technologies gives its customers, such as SandCraft, the greatest flexibility to develop innovative next-generation designs. Ultimately, OEMs can also benefit through reduced time to market."

The SR71000 provides maximum system performance and reliability, which are both critical to network equipment makers. This solution lets OEMs shorten their product development cycles, offer higher value and differentiate their products. The SR71000 will be followed by a series of compatible and integrated processors, which will extend the life cycle of customers' products and preserve their investments.

"The market segments that SandCraft is addressing, Internet infrastructure equipment and high end office automation, continue to be significant and advancing," said Eric Chen, Ph.D., senior technology analyst for J. P. Morgan H&Q. "Control plane processing, in particular, remains one of the most tangible opportunities for silicon suppliers aiming at the communications marketplace."

About the SR71000
SandCraft has carefully crafted the SR71000 to achieve the maximum speed and efficiency demanded by high performance embedded applications, such as networking and imaging applications. This MIPS64-class processor can issue and execute up to six instructions per clock cycle, into a pipeline that uses out-of-order issue and dispatch, and in-order retirement. Its highly efficient, two-way superscalar architecture incorporates dual instruction fetch, dual dispatch and dual commit, to maintain a throughput of two instructions per cycle.

The processor has a nine-stage superscalar pipeline for high clock frequency, with a pipeline-bypass architecture optimized for minimizing instruction-independent stalls. Its sophisticated, dynamic branch prediction capability sustains performance with 97 percent accuracy, by keeping the pipeline fully utilized and minimizing branch mispredictions. The implementation methodology of the CPU allows it to be rapidly migrated to more advanced processes and therefore higher clock frequencies, without necessitating changes to the pipeline architecture. This ensures that a customer's investment in developing with this architecture will be protected as process technology advances.

The SR71000 optimizes system performance and reduces system cost with integrated on-chip memory, including 32 KB each of primary instruction and primary data cache; 512 KB of unified secondary cache; and tertiary cache control, including on-chip tertiary cache tags that can support up to 16 MB of external tertiary cache using commodity SRAMs. The 4-way set associative primary caches and 8-way set associative secondary and tertiary caches provide capacity and rapid access to critical data and instructions. The processor also supports cache line locking and prefetching for improved performance.

The SR71000's high performance 64-bit system interface is fully compatible with existing implementations of the MIPS address and data interface, known as SysAD, operating at an interface bus frequency of up to 133 MHz, with split transactions and out-of-order return.

The SR71000 is a fully static design with dynamic energy-saving features that provide very low power dissipation for its high level of performance. For example, at clock speeds of 600 MHz, it consumes less than four watts. At 800 MHz, it will consume less than five watts.

The chip's high performance floating-point unit is fully MIPS64-compliant and is decoupled from the integer pipeline for autonomous integer and floating-point operations.

The SR71000 support toolkit includes a comprehensive set of simulation tools and development boards. The SR71000 leverages standard third-party software tools, such as compilers from Red Hat, and embedded operating systems from Wind River, to give developers programming flexibility along with rapid time-to-market. The SR71000 toolkit includes a development board with Ethernet ports and logic analyzer connection ports for convenient code development and debugging; a full set of compilation tools, including an optimizing C complier from Red Hat optimized specifically for this CPU architecture; linkers, loaders and libraries; and a full set of documentation. This toolkit is available now for qualified customers.

SandCraft's manufacturing partner is United Microelectronics Corporation (UMC), which manufactures the SandCraft SR71000 in a 0.15 um state-of-the-art CMOS copper process with seven levels of metal interconnect. The 800MHz speed grade part is being built on UMC's 0.13 um process with eight layers of copper interconnect using the low K dielectric SiLK(TM) process, one of the highest performance processes in the industry.

About SandCraft Inc.
SandCraft, founded in June 1996, develops and markets advanced superscalar microprocessors, based on the MIPS Instruction Set Architecture for use as computing engines in high-performance embedded applications. These processors are primarily targeted for use in communications applications, such as control plane processing in Internet core and edge switch routers. Office automation applications, such as color laser printers and raster image processing, also utilize processors of this class. For more information, visit http://www.sandcraft.com.

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