Rambus and Northwest Logic Certify Interoperability of DDR4/3 PHY and Controller
Update: Rambus Completes Acquisition of Northwest Logic, Extending Leadership in Interface IP (Aug. 27, 2019 )
Integrated IP block achieves both high-performance and efficiency; tested and validated system-level design provides superior signal integrity and reliability
SUNNYVALE, Calif. and BEAVERTON, Ore. – August 26, 2014 – Rambus Inc. (NASDAQ:RMBS) and Northwest Logic today announced they have validated interoperability of the Rambus R+™ DDR4/3 PHY with the Northwest Logic DDR4/3 SDRAM Controller Core. The combined solution provides customers with a differentiated memory subsystem that brings together the superior signal integrity offered by the Rambus R+ PHY along with the robust Northwest Logic controller core for a proven and easy-to-integrate solution.
“Given the industry’s ongoing demand for higher memory performance to manage greater amounts of data, this integrated solution provides customers with an easy way to integrate a tested and validated PHY/controller combination, ideal for networking, computing, and consumer applications requiring the best possible performance,” said Kevin Donnelly, general manager of the Memory and Interface division at Rambus. “We look forward to continuing our partnership with Northwest Logic and ongoing collaboration between our companies.”
“Our DDR4/3 SDRAM Controller Core has been successfully deployed in a wide variety of customer systems demonstrating high reliability and performance,” said Brian Daellenbach, president of Northwest Logic. “We are excited to offer a complete DDR4/3 solution with Rambus ensuring our customers achieve the best possible combined memory solution for their high data demands.”
The Rambus R+ DDR4/3 PHY enables customers to differentiate their offerings by providing industry-leading performance while maintaining full compatibility with industry-standard DDR4 and DDR3 interfaces. The R+ DDR4/3 PHY delivers versatile configuration options for both area- and power-optimized consumer applications and performance-intensive compute applications. The PHY is available in several low-power foundry processes and can be configured for both flip-chip and wire bond packages with data rates ranging from 800 to 3200Mbps.
The Northwest Logic DDR4/3 SDRAM Controller Cores are part of a family of silicon-proven, high-performance, easy-to-use memory controller cores that provide support for DDR4/3/2/1 LPDDR4/3/2/1, HBM, MRAM, RLDRAM 3/II. In addition, the Northwest Logic DDR4/3 SDRAM Controller Core provides high bus efficiency using request reordering, bank management and look-ahead processing. Northwest Logic also provides AXI/AHB bus interface, Error Correction Code (ECC), Read-Modify-Write and Multi-Port Front-End add-on cores to further simplify user designs. These cores support the highest memory clock rates, require minimal gate count and, as part of the solution, Northwest Logic offers a complete Memory Test Package for validation.
Northwest Logic has joined the Rambus Partner Program, which will enable further collaboration on other combined IP blocks offerings between the two companies. For additional information on the Rambus Partner Program, visit rambus.com/partners.
Follow Rambus
Company website: rambus.com
Rambus blog: rambus.com/news-events/bloghttp://www.getbooker.com/company/blog
Twitter: @rambusinc
LinkedIn: www.linkedin.com/company/rambus
Facebook: www.facebook.com/RambusInc
##
About Rambus Inc.
Rambus brings invention to market. Our customizable IP cores, architecture licenses, tools, services, and training improve the competitive advantage of our customer’s products while accelerating their time-to-market. Rambus products and innovations capture, secure and move data. For more information, visit rambus.com.
About Northwest Logic
Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express solution (PCI Express 3.0, 2.1 and 1.1 cores and drivers), Memory Interface Solution (DDR4/3/2, LPDDR4/3/2 SDRAM; HBM, MRAM, RLDRAM 3/II), and MIPI Solution (CSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs. For additional information, visit www.nwlogic.com.
|
Related News
- Rambus and Northwest Logic Certify Interoperability of HBM2 Interface Solution for High-performance Networking and Data Center Applications
- Rambus Develops R+ DDR4/3 PHY on Samsung 28nm LPP Process
- Rambus and Mobiveil Partner to Bring Pre-Validated Solution to Chip Makers, Delivering Memory Flexibility and Accelerated Time-to-Market
- Northwest Logic's PCI Express 3.0 Solution passes PCI-SIG PCIe 3.0 Compliance Testing at First Official PCIe 3.0 Compliance Workshop
- PLDA and GUC Announce Industry's First Successful PCIe Gen 3 Controller and PHY Combination on TSMC's 28nm HPM Process Technology
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |