Data Centers May Ride on ASICs
Research Targets 2020 System
Rick Merritt, EETimes
8/28/2014 06:00 AM EDT
MOUNTAIN VIEW, Calif. — Big data centers will eventually run on custom ASICs, according to UC Berkeley Professor David A. Patterson, who is building a research system to show the way. Patterson described Firebox, a warehouse-scale computer targeted at 2020 in a keynote at Hot Interconnects here.
As Moore's law slows down, ASICs will get easier and cheaper, Patterson forecasted. It is already talking about three years instead of the usual 18 months to pack twice as many transistors in the same space, and the time span will stretch to more than five years in the future, he said.
E-mail This Article | Printer-Friendly Page |
Related News
- AI Comes to ASICs in Data Centers
- Alchip and Credo Provide 28Gbps SerDes ASICs for Enterprise Data Communication
- Xilinx Solutions Target Growing ASIC and ASSP Gaps for Next-Generation Smarter Networks and Data Centers
- SIAE Microelettronica Selects Ensilica as Key Partner to Design ASICs for Next-Generation Telecom Equipment
- Semiwise, sureCore, and Cadence Showcase Breakthrough in Cryogenic CMOS Circuit Development for Quantum Computing and Energy-Efficient Data Centers
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models