LSI Logic tailors ARM and MIPS processor core configurations with new FlexCore methodology
Automated methodology configures processor cores to meet individual customer requirements
MILPITAS, Calif., July 9, 2002 – LSI Logic Corporation today announced the availability of fully-configurable implementations of popular ARM® and MIPS® embedded processor cores enabled by the LSI Logic FlexCore® methodology. The FlexCore methodology is an automated procedure for deploying synthesized embedded processor cores that rapidly delivers the cores with any customer-requested combination of cache memory, ASIC library type, and metal layer stack option. This enhanced level of CoreWare® intellectual property (IP) optimization will benefit many of the company's leading edge communications, storage, and consumer ASIC customers who are embedding processor cores in their System-on-a-Chip (SoC) designs.
Initial cores, available now as FlexCore processors, include the ARM926EJ-S™, ARM946E-S™, ARM966E-S™, ARM7EJ-S™, ARM7TDMI-S™, and the MIPS32™ 4KEc. When selecting these cores from LSI Logic, SoC designers can define their specific needs for instruction and data cache sizes, instruction and data tightly coupled memories (TCMs), target process technology, target ASIC libraries (high performance, high density or low leakage) and the number of metal routing layers required. Customers can also select between high-performance and high-density memory types to further optimize the processor core die size, depending on their particular frequency requirements. Once the customer has decided on the optimal processor configuration, a design simulation model can be provided within a week, and complete CoreWare deliverables within four weeks.
"The LSI Logic FlexCore approach of tailoring embedded processor configurations to exact customers requirements serves customer needs much better than traditional ‘one-size fits all' embedded processor offerings," said Rafi Kedem, senior director of the Processor Cores Technology Group at LSI Logic. "Through the addition of this automated processor core implementation methodology to our already robust offering of finely-tuned, high-frequency cores, we can now give each customer the optimum processor configuration for their particular design."
LSI Logic has an extensive CoreWare portfolio of processors supporting clock frequencies of up to 333 MHz. The portfolio includes the ARM1026EJ-S™, ARM926EJ-S, ARM946E-S, ARM966E-S, ARM7EJ-S, and ARM7TDMI-S processor cores from ARM Limited, the MIPS64™ 5Kf and MIPS32 4KEc from MIPS Technologies, Inc., and ZSP™ DSP processor cores. The company also offers a broad range of processor peripherals, a complete family of processor subsystem reference designs, and processor based platforms for customers' SoC design needs. LSI Logic also provides ‘rapid prototyping' support as well as worldwide processor integration support. For over two years LSI Logic has standardized on the ARM AMBA® bus for SoC connectivity on all processor related intellectual property (IP) functions.
About LSI Logic Corporation
LSI Logic Corporation (NYSE: LSI) is a leading designer and manufacturer of communications, consumer and storage semiconductors for applications that access, interconnect and store data, voice and video. In addition, the company supplies storage network solutions for the enterprise. LSI Logic is headquartered at 1621 Barber Lane, Milpitas, CA 95035, http://www.lsilogic.com .
|
Related News
- LSI Logic ECC Core Significantly Reduces Die Area and Cost of Adding ECC to Arm Processor Based SoC Designs
- LSI Logic Licenses Highest Performance MIPS32 24K Processor Core Family From MIPS Technologies
- LSI Logic announces ZSP Digital Signal Processor Core Module boards for ARM+DSP solution
- LSI Logic pushes synthesized Arm processor core to 200 MHz
- MIPS Technologies Licenses MIPS64[tm] 5Kf[tm] and MIPS32[tm]4KEc[tm] Processor Cores to LSI Logic
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |